A 20-GHz injection-locked LC divider with a 25-% locking range

Takayuki Shibasaki; Hirotaka Tamura; Kouichi Kanda; Hisakatsu Yamaguchi; Junji Ogawa; Tadahiro Kuroda

A 20-GHz injection-locked LC divider with a 25-% locking range

Takayuki Shibasaki, Hirotaka Tamura, Kouichi Kanda, Hisakatsu Yamaguchi, Junji Ogawa, Tadahiro Kuroda

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Abstract

A 20-GHz injection-locked LC divider is described. A Miller divider topology was employed along with a coupling circuit to maximize the locking range. A test chip designed in a 90-nm CMOS technology operates at 20 GHz with 25-% locking range while consuming 6.4 m W of power.

Original language	English
Title of host publication	2006 Symposium on VLSI Circuits, VLSIC - Digest of Technical Papers
Pages	170-171
Number of pages	2
Publication status	Published - 2006 Dec 1
Event	2006 Symposium on VLSI Circuits, VLSIC - Honolulu, HI, United States Duration: 2006 Jun 15 → 2006 Jun 17

Publication series

Name	IEEE Symposium on VLSI Circuits, Digest of Technical Papers

Other

Other	2006 Symposium on VLSI Circuits, VLSIC
Country/Territory	United States
City	Honolulu, HI
Period	06/6/15 → 06/6/17

Keywords

CMOS
Frequency divider
Injection locking
Miller divider
Quadrature
Voltage-controlled oscillator (VCO)

ASJC Scopus subject areas

Electronic, Optical and Magnetic Materials
Electrical and Electronic Engineering

Cite this

A 20-GHz injection-locked LC divider with a 25-% locking range. / Shibasaki, Takayuki; Tamura, Hirotaka; Kanda, Kouichi et al.
2006 Symposium on VLSI Circuits, VLSIC - Digest of Technical Papers. 2006. p. 170-171 1705364 (IEEE Symposium on VLSI Circuits, Digest of Technical Papers).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Shibasaki, T, Tamura, H, Kanda, K, Yamaguchi, H, Ogawa, J & Kuroda, T 2006, A 20-GHz injection-locked LC divider with a 25-% locking range. in 2006 Symposium on VLSI Circuits, VLSIC - Digest of Technical Papers., 1705364, IEEE Symposium on VLSI Circuits, Digest of Technical Papers, pp. 170-171, 2006 Symposium on VLSI Circuits, VLSIC, Honolulu, HI, United States, 06/6/15.

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keywords = "CMOS, Frequency divider, Injection locking, Miller divider, Quadrature, Voltage-controlled oscillator (VCO)",

author = "Takayuki Shibasaki and Hirotaka Tamura and Kouichi Kanda and Hisakatsu Yamaguchi and Junji Ogawa and Tadahiro Kuroda",

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AU - Ogawa, Junji

AU - Kuroda, Tadahiro

PY - 2006/12/1

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AB - A 20-GHz injection-locked LC divider is described. A Miller divider topology was employed along with a coupling circuit to maximize the locking range. A test chip designed in a 90-nm CMOS technology operates at 20 GHz with 25-% locking range while consuming 6.4 m W of power.

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KW - Injection locking

KW - Miller divider

KW - Quadrature

KW - Voltage-controlled oscillator (VCO)

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BT - 2006 Symposium on VLSI Circuits, VLSIC - Digest of Technical Papers

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A 20-GHz injection-locked LC divider with a 25-% locking range

Abstract

Publication series

Other

Keywords

ASJC Scopus subject areas

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