A 9b 100MS/s 1.46mW SAR ADC in 65nm CMOS

Yanfei Chen; Sanroku Tsukamoto; Tadahiro Kuroda

doi:10.1109/ASSCC.2009.5357199

A 9b 100MS/s 1.46mW SAR ADC in 65nm CMOS

Yanfei Chen, Sanroku Tsukamoto, Tadahiro Kuroda

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

50 Citations (Scopus)

Abstract

A 9b 100MS/s successive approximation register (SAR) ADC has been implemented in 65nm CMOS, with an active area of 0.012mm². A tri-level based charge redistribution technique improves DAC switching energy efficiency and settling time, which is achieved by connecting bottom plates of differential capacitor arrays. The ADC achieves an SNDR of 53.1dB (8.53 ENOB) and consumes 1.46mW from a 1.2V supply, resulting in an FOM of 39fJ/conversion-step.

Original language	English
Title of host publication	Proceedings of Technical Papers - 2009 IEEE Asian Solid-State Circuits Conference, A-SSCC 2009
Pages	145-148
Number of pages	4
DOIs	https://doi.org/10.1109/ASSCC.2009.5357199
Publication status	Published - 2009 Dec 1
Event	2009 IEEE Asian Solid-State Circuits Conference, A-SSCC 2009 - Taipei, Taiwan, Province of China Duration: 2009 Nov 16 → 2009 Nov 18

Publication series

Name	Proceedings of Technical Papers - 2009 IEEE Asian Solid-State Circuits Conference, A-SSCC 2009

Conference

Conference	2009 IEEE Asian Solid-State Circuits Conference, A-SSCC 2009
Country/Territory	Taiwan, Province of China
City	Taipei
Period	09/11/16 → 09/11/18

ASJC Scopus subject areas

Hardware and Architecture
Electrical and Electronic Engineering

UN SDGs

This output contributes to the following UN Sustainable Development Goals (SDGs)

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10.1109/ASSCC.2009.5357199

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A 9b 100MS/s 1.46mW SAR ADC in 65nm CMOS. / Chen, Yanfei; Tsukamoto, Sanroku; Kuroda, Tadahiro.
Proceedings of Technical Papers - 2009 IEEE Asian Solid-State Circuits Conference, A-SSCC 2009. 2009. p. 145-148 5357199 (Proceedings of Technical Papers - 2009 IEEE Asian Solid-State Circuits Conference, A-SSCC 2009).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Chen, Y, Tsukamoto, S & Kuroda, T 2009, A 9b 100MS/s 1.46mW SAR ADC in 65nm CMOS. in Proceedings of Technical Papers - 2009 IEEE Asian Solid-State Circuits Conference, A-SSCC 2009., 5357199, Proceedings of Technical Papers - 2009 IEEE Asian Solid-State Circuits Conference, A-SSCC 2009, pp. 145-148, 2009 IEEE Asian Solid-State Circuits Conference, A-SSCC 2009, Taipei, Taiwan, Province of China, 09/11/16. https://doi.org/10.1109/ASSCC.2009.5357199

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A 9b 100MS/s 1.46mW SAR ADC in 65nm CMOS

Abstract

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UN SDGs

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