A high-speed inductive-coupling link with burst transmission

Noriyuki Miura; Yoshinori Kohama; Yasfumi Sugimori; Hiroki Ishikuro; Takayasu Sakurai; Tadahiro Kuroda

doi:10.1109/JSSC.2008.2012365

A high-speed inductive-coupling link with burst transmission

Noriyuki Miura, Yoshinori Kohama, Yasfumi Sugimori, Hiroki Ishikuro, Takayasu Sakurai, Tadahiro Kuroda

Department of Electronics and Electrical Engineering

Research output: Contribution to journal › Article › peer-review

53 Citations (Scopus)

Abstract

A high-speed inductive-coupling link is presented. It communicates at a data rate of 11 Gb/s for a communication distance of 15 μm in 180 nm CMOS. The data rate is 11× higher than previous inductive-coupling links. The communication distance is 5× longer than a capacitive-coupling link for the same data rate, bit error rate, and layout area. Burst transmission utilizing the high-speed inductive-coupling link is also presented. Multi-bit data links are multiplexed into a single burst data link. It reduces layout area by a factor of three in 180 nm CMOS and a factor of nine in 90 nm CMOS.

Original language	English
Article number	4787576
Pages (from-to)	947-955
Number of pages	9
Journal	IEEE Journal of Solid-State Circuits
Volume	44
Issue number	3
DOIs	https://doi.org/10.1109/JSSC.2008.2012365
Publication status	Published - 2009 Mar

Keywords

Burst transmission
Data link
High speed
Inductive coupling
Three dimensional

ASJC Scopus subject areas

Electrical and Electronic Engineering

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10.1109/JSSC.2008.2012365

Cite this

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title = "A high-speed inductive-coupling link with burst transmission",

abstract = "A high-speed inductive-coupling link is presented. It communicates at a data rate of 11 Gb/s for a communication distance of 15 μm in 180 nm CMOS. The data rate is 11× higher than previous inductive-coupling links. The communication distance is 5× longer than a capacitive-coupling link for the same data rate, bit error rate, and layout area. Burst transmission utilizing the high-speed inductive-coupling link is also presented. Multi-bit data links are multiplexed into a single burst data link. It reduces layout area by a factor of three in 180 nm CMOS and a factor of nine in 90 nm CMOS.",

keywords = "Burst transmission, Data link, High speed, Inductive coupling, Three dimensional",

author = "Noriyuki Miura and Yoshinori Kohama and Yasfumi Sugimori and Hiroki Ishikuro and Takayasu Sakurai and Tadahiro Kuroda",

note = "Funding Information: Manuscript received June 09, 2008; revised November 14, 2008. Current version published February 25, 2009. This work was supported by CREST/JST. The 180 nm CMOS VLSI chip in this work was fabricated by Taiwan Semiconductor Manufacturing Corporation (TSMC). The 90 nm CMOS VLSI chip in this work was fabricated through the chip fabrication program of VDEC, the University of Tokyo, with the collaboration by STARC, Fujitsu Limited, Mat-sushita Electric Industrial Company Limited., NEC Electronics Corporation, Renesas Technology Corporation, and Toshiba Corporation. Copyright: Copyright 2009 Elsevier B.V., All rights reserved.",

year = "2009",

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doi = "10.1109/JSSC.2008.2012365",

language = "English",

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AU - Kohama, Yoshinori

AU - Sugimori, Yasfumi

AU - Ishikuro, Hiroki

AU - Sakurai, Takayasu

AU - Kuroda, Tadahiro

N1 - Funding Information: Manuscript received June 09, 2008; revised November 14, 2008. Current version published February 25, 2009. This work was supported by CREST/JST. The 180 nm CMOS VLSI chip in this work was fabricated by Taiwan Semiconductor Manufacturing Corporation (TSMC). The 90 nm CMOS VLSI chip in this work was fabricated through the chip fabrication program of VDEC, the University of Tokyo, with the collaboration by STARC, Fujitsu Limited, Mat-sushita Electric Industrial Company Limited., NEC Electronics Corporation, Renesas Technology Corporation, and Toshiba Corporation. Copyright: Copyright 2009 Elsevier B.V., All rights reserved.

PY - 2009/3

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N2 - A high-speed inductive-coupling link is presented. It communicates at a data rate of 11 Gb/s for a communication distance of 15 μm in 180 nm CMOS. The data rate is 11× higher than previous inductive-coupling links. The communication distance is 5× longer than a capacitive-coupling link for the same data rate, bit error rate, and layout area. Burst transmission utilizing the high-speed inductive-coupling link is also presented. Multi-bit data links are multiplexed into a single burst data link. It reduces layout area by a factor of three in 180 nm CMOS and a factor of nine in 90 nm CMOS.

AB - A high-speed inductive-coupling link is presented. It communicates at a data rate of 11 Gb/s for a communication distance of 15 μm in 180 nm CMOS. The data rate is 11× higher than previous inductive-coupling links. The communication distance is 5× longer than a capacitive-coupling link for the same data rate, bit error rate, and layout area. Burst transmission utilizing the high-speed inductive-coupling link is also presented. Multi-bit data links are multiplexed into a single burst data link. It reduces layout area by a factor of three in 180 nm CMOS and a factor of nine in 90 nm CMOS.

KW - Burst transmission

KW - Data link

KW - High speed

KW - Inductive coupling

KW - Three dimensional

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A high-speed inductive-coupling link with burst transmission

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Keywords

ASJC Scopus subject areas

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