A software development environment for a multi-chip convolutional network accelerator

Tetsui Ohkubo, Mankit Sit, Hideharu Amano, Ryo Takata, Ryuichi Sakamoto, Masaaki Kondo

Research output: Contribution to journalArticlepeer-review


A building block convolutional neural network accelerator consists of a host and multiple accelerator chips which can scale the performance by changing the number of stacked chips. In order to program the host and the accelerators, an integrated programming development environment called NAMACHA is proposed. It includes compilers for convolutional neural network accelerators and a system level simulator including inter-chip communication latency. On the simulator, the total application runs 4390x faster than that of the logic level simulation with 1.27% difference of clock cycle counts. The simulation results of implementing AlexNet, SIMD instructions provided in the accelerator improved the performance by 70% on average. It demonstrates that NAMACHA can be used for architectural exploration as well as development of practical software.

Original languageEnglish
Pages (from-to)81-90
Number of pages10
JournalInternational Journal of Computers and their Applications
Issue number2
Publication statusPublished - 2017 Jun


  • Convolutional neural network
  • Emulator
  • Software develelopment kit

ASJC Scopus subject areas

  • General Computer Science


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