A software radio receiver with direct conversion and its digital processing

Robert Morelos-Zaragoza; Shinichiro Haruyama; Masayoshi Abe; Noboru Sasho; Lachlan B. Michael; Ryuji Kohno

A software radio receiver with direct conversion and its digital processing

Robert Morelos-Zaragoza, Shinichiro Haruyama, Masayoshi Abe, Noboru Sasho, Lachlan B. Michael, Ryuji Kohno

Research output: Contribution to journal › Article › peer-review

Abstract

This paper discusses a design methodology suitable for the development of software defined radio platforms. A flexible digital receiver was designed and implemented using a multi-port direct converter and an FPGA-based platform. The design starts with a hardware-oriented top-level system model. The model is built based on basic signal processing blocks connected together in a graphical tool. Carrier symbol timing recovery is implemented in the discrete-time (digital) domain with an interpolator-based synchronizer. Carrier phase and frequency are recovered using a feedback synchronization algorithm (a second-order type-II digital PLL). Experimental results of the platform and its simulation results demonstrate the effectiveness of the proposed design methodology.

Original language	English
Pages (from-to)	2741-2749
Number of pages	9
Journal	IEICE Transactions on Communications
Volume	E85-B
Issue number	12
Publication status	Published - 2002 Dec
Externally published	Yes

Keywords

Design methodology
Direct conversion
Software defined radio

ASJC Scopus subject areas

Software
Computer Networks and Communications
Electrical and Electronic Engineering

Cite this

@article{58848958711e42c295635ab67d41bd6c,

title = "A software radio receiver with direct conversion and its digital processing",

abstract = "This paper discusses a design methodology suitable for the development of software defined radio platforms. A flexible digital receiver was designed and implemented using a multi-port direct converter and an FPGA-based platform. The design starts with a hardware-oriented top-level system model. The model is built based on basic signal processing blocks connected together in a graphical tool. Carrier symbol timing recovery is implemented in the discrete-time (digital) domain with an interpolator-based synchronizer. Carrier phase and frequency are recovered using a feedback synchronization algorithm (a second-order type-II digital PLL). Experimental results of the platform and its simulation results demonstrate the effectiveness of the proposed design methodology.",

keywords = "Design methodology, Direct conversion, Software defined radio",

author = "Robert Morelos-Zaragoza and Shinichiro Haruyama and Masayoshi Abe and Noboru Sasho and Michael, {Lachlan B.} and Ryuji Kohno",

year = "2002",

month = dec,

language = "English",

volume = "E85-B",

pages = "2741--2749",

journal = "IEICE Transactions on Communications",

issn = "0916-8516",

publisher = "Maruzen Co., Ltd/Maruzen Kabushikikaisha",

number = "12",

}

TY - JOUR

T1 - A software radio receiver with direct conversion and its digital processing

AU - Morelos-Zaragoza, Robert

AU - Haruyama, Shinichiro

AU - Abe, Masayoshi

AU - Sasho, Noboru

AU - Michael, Lachlan B.

AU - Kohno, Ryuji

PY - 2002/12

Y1 - 2002/12

N2 - This paper discusses a design methodology suitable for the development of software defined radio platforms. A flexible digital receiver was designed and implemented using a multi-port direct converter and an FPGA-based platform. The design starts with a hardware-oriented top-level system model. The model is built based on basic signal processing blocks connected together in a graphical tool. Carrier symbol timing recovery is implemented in the discrete-time (digital) domain with an interpolator-based synchronizer. Carrier phase and frequency are recovered using a feedback synchronization algorithm (a second-order type-II digital PLL). Experimental results of the platform and its simulation results demonstrate the effectiveness of the proposed design methodology.

AB - This paper discusses a design methodology suitable for the development of software defined radio platforms. A flexible digital receiver was designed and implemented using a multi-port direct converter and an FPGA-based platform. The design starts with a hardware-oriented top-level system model. The model is built based on basic signal processing blocks connected together in a graphical tool. Carrier symbol timing recovery is implemented in the discrete-time (digital) domain with an interpolator-based synchronizer. Carrier phase and frequency are recovered using a feedback synchronization algorithm (a second-order type-II digital PLL). Experimental results of the platform and its simulation results demonstrate the effectiveness of the proposed design methodology.

KW - Design methodology

KW - Direct conversion

KW - Software defined radio

UR - http://www.scopus.com/inward/record.url?scp=0037284604&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=0037284604&partnerID=8YFLogxK

M3 - Article

AN - SCOPUS:0037284604

SN - 0916-8516

VL - E85-B

SP - 2741

EP - 2749

JO - IEICE Transactions on Communications

JF - IEICE Transactions on Communications

IS - 12

ER -

A software radio receiver with direct conversion and its digital processing

Abstract

Keywords

ASJC Scopus subject areas

Other files and links

Fingerprint

Cite this