Abstract
A wireless vertical bus with collision detection scheme for 3-D network-on-chips (NoC) is presented. Utilizing inductive-coupling between coils, wireless connection between all stacked chips is established. Data collision is detected by sensing magnetic field variation. A test chip is fabricated in 65 nm SOI CMOS technology. A data rate of 0.8 Gb/s with a BER < 10-12 is achieved. The energy efficiency is better than 1.4 pJ/b. A collision detection circuit is implemented and its operation is confirmed.
| Original language | English |
|---|---|
| Title of host publication | 2016 IEEE Asian Solid-State Circuits Conference, A-SSCC 2016 - Proceedings |
| Publisher | Institute of Electrical and Electronics Engineers Inc. |
| Pages | 41-44 |
| Number of pages | 4 |
| ISBN (Electronic) | 9781509037001 |
| DOIs | |
| Publication status | Published - 2017 Feb 6 |
| Event | 12th IEEE Asian Solid-State Circuits Conference, A-SSCC 2016 - Toyama, Japan Duration: 2016 Nov 7 → 2016 Nov 9 |
Other
| Other | 12th IEEE Asian Solid-State Circuits Conference, A-SSCC 2016 |
|---|---|
| Country/Territory | Japan |
| City | Toyama |
| Period | 16/11/7 → 16/11/9 |
Keywords
- 3-D integration
- collision detection
- inductive-coupling bus
- Network-on-chips (NoC)
ASJC Scopus subject areas
- Electrical and Electronic Engineering
- Hardware and Architecture
