TY - GEN
T1 - An integration of imprecise computation model and real-time voltage and frequency scaling
AU - Mizotani, Keigo
AU - Hatori, Yusuke
AU - Kumura, Yusuke
AU - Takasu, Masayoshi
AU - Chishiro, Hiroyuki
AU - Yamasaki, Nobuyuki
N1 - Publisher Copyright:
Copyright © 2015 by The International Society for Computers and Their Applications (ISCA).
PY - 2015
Y1 - 2015
N2 - As microprocessor performance grows, high throughput and the power management are becoming more important on embedded real-time systems. Real- Time Voltage and Frequency Scaling (RT-VFS) has been proposed to reduce the power consumption and ensure real-time constraints. An imprecise computation model adds an optional part to Liu and Layland's model to improve the quality of computations. This paper proposes the scheme to integrate an imprecise computation model and RT-VFS that can reduce the power consumption and improve the quality of computations within real-time constraints. Moreover, we implement this scheme on Dependable Responsive Multithreaded Processor (D-RMTP). D-RMTP is a prioritized simultaneous multithreaded processor for embedded real-time systems and D-RMTP system in a package supports RT-VFS. We implement the proposed scheme by use of D-RMTP original features to improve the quality of computations and reduce the energy consumption. Through experimental evaluation, we show that the proposed scheme satisfies both the lower energy consumption and higher performance on real environments. In our evaluation, the proposed scheme achieves a maximum of 135% improvement of the quality of computations per energy consumption.
AB - As microprocessor performance grows, high throughput and the power management are becoming more important on embedded real-time systems. Real- Time Voltage and Frequency Scaling (RT-VFS) has been proposed to reduce the power consumption and ensure real-time constraints. An imprecise computation model adds an optional part to Liu and Layland's model to improve the quality of computations. This paper proposes the scheme to integrate an imprecise computation model and RT-VFS that can reduce the power consumption and improve the quality of computations within real-time constraints. Moreover, we implement this scheme on Dependable Responsive Multithreaded Processor (D-RMTP). D-RMTP is a prioritized simultaneous multithreaded processor for embedded real-time systems and D-RMTP system in a package supports RT-VFS. We implement the proposed scheme by use of D-RMTP original features to improve the quality of computations and reduce the energy consumption. Through experimental evaluation, we show that the proposed scheme satisfies both the lower energy consumption and higher performance on real environments. In our evaluation, the proposed scheme achieves a maximum of 135% improvement of the quality of computations per energy consumption.
KW - Embedded real-time system
KW - Imprecise computation model
KW - Power consumption
KW - RT-VFS
UR - http://www.scopus.com/inward/record.url?scp=84925936000&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=84925936000&partnerID=8YFLogxK
M3 - Conference contribution
AN - SCOPUS:84925936000
T3 - Proceedings of the 30th International Conference on Computers and Their Applications, CATA 2015
SP - 63
EP - 70
BT - Proceedings of the 30th International Conference on Computers and Their Applications, CATA 2015
A2 - Miller, Les
PB - The International Society for Computers and Their Applications (ISCA)
T2 - 30th International Conference on Computers and Their Applications, CATA 2015
Y2 - 9 March 2015 through 11 March 2015
ER -