Architecture-dependent execution time of Shor's algorithm

Rodney Van Meter, Kohei M. Itoh, Thaddeus D. Ladd

Research output: Chapter in Book/Report/Conference proceedingConference contribution

9 Citations (Scopus)

Abstract

We show how the execution time of algorithms on quantum computers depends on the architecture of the quantum computer, the choice of algorithms (including subroutines such as arithmetic), and the "clock speed" of the quantum computer. The primary architectural features of interest are the ability to execute multiple gates concurrently, the number of application-level qubits available, and the interconnection network of qubits. We analyze Shor's algorithm for factoring large numbers in this context. Our results show that, if arbitrary interconnection of qubits is possible, a machine with an application-level clock speed of as low as one-third of a (possibly encoded) gate per second could factor a 576-bit number in under one month, potentially outperforming a large network of classical computers. For nearest-neighbor-only architectures, a clock speed of around twenty-seven gates per second is required.

Original languageEnglish
Title of host publicationMS+S 2006 - Controllable Quantum States
Subtitle of host publicationMesoscopic Superconductivity and Spintronics, Proceedings of the International Symposium
PublisherWorld Scientific Publishing Co. Pte Ltd
Pages183-188
Number of pages6
ISBN (Print)9812814612, 9789812814616
Publication statusPublished - 2008
Event4th International Symposium on Mesoscopic Superconductivity and Spintronics, MS+S 2006 - Atsugi, Japan
Duration: 2006 Feb 272006 Mar 2

Publication series

NameMS+S 2006 - Controllable Quantum States: Mesoscopic Superconductivity and Spintronics, Proceedings of the International Symposium

Other

Other4th International Symposium on Mesoscopic Superconductivity and Spintronics, MS+S 2006
Country/TerritoryJapan
CityAtsugi
Period06/2/2706/3/2

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

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