@inproceedings{4b24ec1555944619ace6363eed906420,
title = "Design and Evaluation of a Switch Architecture for Multistage Interconnection Network with Temporary Directory",
abstract = "Researches on Multistage Interconnection Network (MIN) with cache or cache directories inside the switching elements have been exerted for building cache coherent multiprocessors. We proposed MINDIC (MIN with Directory Cache switch), a novel MIN structure that consists of switching elements with small temporary directory. With the temporary directories built dynamically in each switching element, we can maintain cache consistency with low latency and low memory cost. Previously, three variations of MINDIC protocols were evaluated by trace level simulation. From the detailed evaluation of eviction protocol, it became clear that MINDIC is equivalent to the architecture with full-mapped directories in execution performance. Also, synthesis report using 0.18μm CMOS process shows that the hardware cost is small enough for implementation.",
keywords = "Multiprocessors, Multistage Interconnection Network, Temporary directory",
author = "Masato Sumiyoshi and Yasuki Tanabe and Takashi Midorikawa and Hideharu Amano",
note = "Publisher Copyright: {\textcopyright} (2004) by the International Society for Computers and Their Applications All rights reserved.; 17th International Conference on Parallel and Distributed Computing Systems, PDCS 2004 ; Conference date: 15-09-2004 Through 17-09-2004",
year = "2004",
language = "English",
series = "17th ISCA International Conference on Parallel and Distributed Computing Systems 2004, PDCS 2004",
publisher = "International Society for Computers and Their Applications (ISCA)",
pages = "296--301",
editor = "Bader, {David A.} and Khokhar, {Ashfaq A.}",
booktitle = "17th ISCA International Conference on Parallel and Distributed Computing Systems 2004, PDCS 2004",
address = "United States",
}