Design and evaluation of high performance microprocessor with reconfigurable on-chip memory

T. Ohneda, M. Kondo, M. Imai, H. Nakamura

Research output: Chapter in Book/Report/Conference proceedingConference contribution

3 Citations (Scopus)


The performance gap between processor and main memory is serious problem especially in high performance computing. In order to overcome this problem, we have proposed a new processor architecture called SCIMA, which integrates software-controllable memory (SCM) into a processor chip as a part of main memory in addition to ordinary cache. SCIMA is defined as an extension of a general microprocessor whose load/store unit is extended to control data accesses to the SCM. In this paper, we present a load/store unit of SCIMA by extending the unit of MIPS R10000 processor and evaluate the impact of the extension on area and clock frequency. The evaluation results reveal that SCIMA achieves 1.5 - 10 times higher performance compared with cache based architecture although the cycle time of SCIMA is 5.7% longer.

Original languageEnglish
Title of host publicationProceedings - APCCAS 2002
Subtitle of host publicationAsia-Pacific Conference on Circuits and Systems
PublisherInstitute of Electrical and Electronics Engineers Inc.
Number of pages6
ISBN (Electronic)0780376900
Publication statusPublished - 2002
Externally publishedYes
EventAsia-Pacific Conference on Circuits and Systems, APCCAS 2002 - Denpasar, Bali, Indonesia
Duration: 2002 Oct 282002 Oct 31

Publication series

NameIEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS


OtherAsia-Pacific Conference on Circuits and Systems, APCCAS 2002
CityDenpasar, Bali


  • Clocks
  • Computer architecture
  • Delay
  • Educational programs
  • Frequency
  • High performance computing
  • Memory architecture
  • Microprocessors
  • Prefetching
  • Throughput

ASJC Scopus subject areas

  • Electrical and Electronic Engineering


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