TY - GEN
T1 - Digital rosetta stone
T2 - 2009 Symposium on VLSI Circuits
AU - Yuxiang, Yuan
AU - Miura, Noriyuki
AU - Imai, Shigeki
AU - Ochi, Hiroyuki
AU - Kuroda, Tadahiro
PY - 2009/11/18
Y1 - 2009/11/18
N2 - A permanent memory system is prototyped in 0.18μm CMOS. Data is stored in MROM, and stacked wafers are completely sealed to avoid erosion. Power and data links are provided by inductive coupling. Interleaved power and data transmission eliminates interference. From a distance of 0.2mm, 56mW is delivered with a ripple of 33.6mV. A data rate of over 150Mb/s with BER < 10 -12 is achieved.
AB - A permanent memory system is prototyped in 0.18μm CMOS. Data is stored in MROM, and stacked wafers are completely sealed to avoid erosion. Power and data links are provided by inductive coupling. Interleaved power and data transmission eliminates interference. From a distance of 0.2mm, 56mW is delivered with a ripple of 33.6mV. A data rate of over 150Mb/s with BER < 10 -12 is achieved.
UR - http://www.scopus.com/inward/record.url?scp=70449376994&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=70449376994&partnerID=8YFLogxK
M3 - Conference contribution
AN - SCOPUS:70449376994
SN - 9784863480018
T3 - IEEE Symposium on VLSI Circuits, Digest of Technical Papers
SP - 26
EP - 27
BT - 2009 Symposium on VLSI Circuits
Y2 - 16 June 2009 through 18 June 2009
ER -