TY - GEN
T1 - Fpga/python co-design for lane line detection on a pynq-z1 board
AU - Honda, Koki
AU - Wei, Kaijie
AU - Amano, Hideharu
PY - 2019/10
Y1 - 2019/10
N2 - This paper presents the implementation of lane line detection on FPGA and Python. Lane line detection consists of three functions, median blur, adaptive threshold, and Hough transform. We implemented only accumulation of Hough transform on FPGA. Although the Hough transform cannot be implemented on a low-end FPGA board if implemented directly, by reducing ρθ space, it was successfully implemented on a low-end FPGA board. The rest of the Hough transform was implemented using Python's NumPy and SciPy, and OpenCV. Although it was very easy to write, it did not become a bottleneck for the whole process because of its effectiveness. As a result, we could achieve a 3.9x speedup compared to OpenCV and kept the developing cost down. When implementing median blur and adaptive threshold on an FPGA, we could achieve a 6.34x speedup.
AB - This paper presents the implementation of lane line detection on FPGA and Python. Lane line detection consists of three functions, median blur, adaptive threshold, and Hough transform. We implemented only accumulation of Hough transform on FPGA. Although the Hough transform cannot be implemented on a low-end FPGA board if implemented directly, by reducing ρθ space, it was successfully implemented on a low-end FPGA board. The rest of the Hough transform was implemented using Python's NumPy and SciPy, and OpenCV. Although it was very easy to write, it did not become a bottleneck for the whole process because of its effectiveness. As a result, we could achieve a 3.9x speedup compared to OpenCV and kept the developing cost down. When implementing median blur and adaptive threshold on an FPGA, we could achieve a 6.34x speedup.
KW - PYNQ
KW - fpga
KW - image processing
UR - http://www.scopus.com/inward/record.url?scp=85076174376&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=85076174376&partnerID=8YFLogxK
U2 - 10.1109/MCSoC.2019.00015
DO - 10.1109/MCSoC.2019.00015
M3 - Conference contribution
AN - SCOPUS:85076174376
T3 - Proceedings - 2019 IEEE 13th International Symposium on Embedded Multicore/Many-Core Systems-on-Chip, MCSoC 2019
SP - 53
EP - 60
BT - Proceedings - 2019 IEEE 13th International Symposium on Embedded Multicore/Many-Core Systems-on-Chip, MCSoC 2019
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 13th IEEE International Symposium on Embedded Multicore/Many-Core Systems-on-Chip, MCSoC 2019
Y2 - 1 October 2019 through 4 October 2019
ER -