Germanium- and Silicon-Nanotransistor Designs by Electrical and Thermal Self-Consistent Analysis

Takaya Sugiura, Shiun Yamakiri, Nobuhiko Nakano

Research output: Contribution to journalArticlepeer-review

1 Citation (Scopus)

Abstract

This study evaluated nanometer gate length germanium (Ge) transistors, including the electrical and thermal components, and compared them with silicon (Si) transistors. Nanometer-scale Ge and Si junction-less field-effect transistors (JLFETs) were treated for both NFET and PFET devices under a transient response. Consequently, the electrical and thermal self-consistent simulations revealed that hole carrier transport is more challenging at the channel region for PFET, inhibiting process shrinking. Moreover, the results show that self-heating can reach a dangerous stature, particularly when the channel region is thick. This is because the operation of the nanometer-scale Ge and Si JLFETs depends on the quantum effect, which increases the band-gap energy. The suitable channel design for Ge and Si transistors is almost similar; a heavier doping concentration is favorable for Si transistors. The study concludes that optimizing the channel region to fit the band-gap energy is the most crucial aspect for designing transistors.

Original languageEnglish
Pages (from-to)3365-3373
Number of pages9
JournalIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Volume42
Issue number10
DOIs
Publication statusPublished - 2023 Oct 1

Keywords

  • Device simulation
  • germanium
  • junction-less field-effect transistor (JLFET)
  • nanoelectronics
  • silicon
  • thermal analysis

ASJC Scopus subject areas

  • Software
  • Electrical and Electronic Engineering
  • Computer Graphics and Computer-Aided Design

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