High-sensitivity 1 Gbit/s CMOS receiver integrated with GaAs- or InGaAs-photodiode by wafer-bonding

T. Nakahara; H. Tsuda; N. Ishihara; K. Tateno; C. Amano

doi:10.1049/el:20010506

High-sensitivity 1 Gbit/s CMOS receiver integrated with GaAs- or InGaAs-photodiode by wafer-bonding

T. Nakahara, H. Tsuda, N. Ishihara, K. Tateno, C. Amano

Research output: Contribution to journal › Article › peer-review

13 Citations (Scopus)

Abstract

1Gbit/s III-V/CMOS hybrid receivers consisting of a GaAs- or InGaAs-photodiode and a 0.5μm CMOS receiver circuit have been realised by wafer-bonding. The circuit is simple and compact with high sensitivity and broad bandwidth due to the direct attachment of III-V PDs and the absence of any parasitic capacitance. Sensitivities of -27.4 and -28.0dBm at 1 Gbit/s are demonstrated for 0.85 and 1.55 μm receivers, respectively.

Original language	English
Pages (from-to)	781-783
Number of pages	3
Journal	Electronics Letters
Volume	37
Issue number	12
DOIs	https://doi.org/10.1049/el:20010506
Publication status	Published - 2001 Jun 7
Externally published	Yes

ASJC Scopus subject areas

Electrical and Electronic Engineering

Access to Document

10.1049/el:20010506

Cite this

@article{869f87e32bc74d118b037b3abf4eec21,

title = "High-sensitivity 1 Gbit/s CMOS receiver integrated with GaAs- or InGaAs-photodiode by wafer-bonding",

abstract = "1Gbit/s III-V/CMOS hybrid receivers consisting of a GaAs- or InGaAs-photodiode and a 0.5μm CMOS receiver circuit have been realised by wafer-bonding. The circuit is simple and compact with high sensitivity and broad bandwidth due to the direct attachment of III-V PDs and the absence of any parasitic capacitance. Sensitivities of -27.4 and -28.0dBm at 1 Gbit/s are demonstrated for 0.85 and 1.55 μm receivers, respectively.",

author = "T. Nakahara and H. Tsuda and N. Ishihara and K. Tateno and C. Amano",

year = "2001",

month = jun,

day = "7",

doi = "10.1049/el:20010506",

language = "English",

volume = "37",

pages = "781--783",

journal = "Electronics Letters",

issn = "0013-5194",

publisher = "Institution of Engineering and Technology",

number = "12",

}

TY - JOUR

T1 - High-sensitivity 1 Gbit/s CMOS receiver integrated with GaAs- or InGaAs-photodiode by wafer-bonding

AU - Nakahara, T.

AU - Tsuda, H.

AU - Ishihara, N.

AU - Tateno, K.

AU - Amano, C.

PY - 2001/6/7

Y1 - 2001/6/7

N2 - 1Gbit/s III-V/CMOS hybrid receivers consisting of a GaAs- or InGaAs-photodiode and a 0.5μm CMOS receiver circuit have been realised by wafer-bonding. The circuit is simple and compact with high sensitivity and broad bandwidth due to the direct attachment of III-V PDs and the absence of any parasitic capacitance. Sensitivities of -27.4 and -28.0dBm at 1 Gbit/s are demonstrated for 0.85 and 1.55 μm receivers, respectively.

AB - 1Gbit/s III-V/CMOS hybrid receivers consisting of a GaAs- or InGaAs-photodiode and a 0.5μm CMOS receiver circuit have been realised by wafer-bonding. The circuit is simple and compact with high sensitivity and broad bandwidth due to the direct attachment of III-V PDs and the absence of any parasitic capacitance. Sensitivities of -27.4 and -28.0dBm at 1 Gbit/s are demonstrated for 0.85 and 1.55 μm receivers, respectively.

UR - http://www.scopus.com/inward/record.url?scp=0035821973&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=0035821973&partnerID=8YFLogxK

U2 - 10.1049/el:20010506

DO - 10.1049/el:20010506

M3 - Article

AN - SCOPUS:0035821973

SN - 0013-5194

VL - 37

SP - 781

EP - 783

JO - Electronics Letters

JF - Electronics Letters

IS - 12

ER -

High-sensitivity 1 Gbit/s CMOS receiver integrated with GaAs- or InGaAs-photodiode by wafer-bonding

Abstract

ASJC Scopus subject areas

Access to Document

Other files and links

Fingerprint

Cite this