High-sensitivity 1-Gb/s CMOS receiver integrated with a III-V photodiode by wafer-bonding

Tatsushi Nakahara, Hiroyuki Tsuda, Kouta Tateno, Noboru Ishihara, Chikara Amano

Research output: Contribution to journalConference articlepeer-review

3 Citations (Scopus)


A GaAs or InGaAs photodiode was attached to a 0.5-μm CMOS receiver circuit by a polyimide wafer-bonding technique. The circuit is simple and small, and has high sensitivity and a broad bandwidth due to the low parasitic capacitance on the photodiode. The receiver operates with a single 3.3-V supply voltage at either 0.85 or 1.55 μm and achieves -27.1-dBm sensitivity at 1 Gb/s.

Original languageEnglish
Pages (from-to)17-18
Number of pages2
JournalLEOS Summer Topical Meeting
Publication statusPublished - 2000 Jan 1
Externally publishedYes
Event2000 IEEE/LEOS Summer Topical Meeting - Aventura, FL, USA
Duration: 2000 Jul 242000 Jul 28

ASJC Scopus subject areas

  • Atomic and Molecular Physics, and Optics
  • Electrical and Electronic Engineering


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