Piezoresistive pressure sensor designed in the standard CMOS process is proposed. The device features the electrical separation by the pn-junction provided by the standard CMOS process, which it does not need any MEMS processes or the post-processes. The proposed device is composed of vertical multi-pn junctions, and two methods of 3-layer and 4-layer are considered with their advantages and drawbacks. It features high-temperature robustness with silicon material, and integrability to silicon devices. It is designed without any additional processes and therefore enables to compatible to the CMOS devices with low-cost and suitable for mass production that are favorable for IoT (Internet of Things) applications.
|Number of pages||5|
|Journal||IEEE Transactions on Circuits and Systems II: Express Briefs|
|Publication status||Published - 2023 Feb 1|
- high temperature
- triple well
ASJC Scopus subject areas
- Electrical and Electronic Engineering