JUMP-1 router chip: A versatile router for supporting a distributed shared memory

Hiroaki Nishi; Katsunobu Nishimura; Ken ichiro Anjo; Tomohiro Kudoh; Hideharu Amano

JUMP-1 router chip: A versatile router for supporting a distributed shared memory

Hiroaki Nishi, Katsunobu Nishimura, Ken ichiro Anjo, Tomohiro Kudoh, Hideharu Amano

Research output: Contribution to journal › Conference article › peer-review

Abstract

JUMP-1 is currently under development by seven Japanese universities to establish techniques of an efficient distributed shared memory on a massively parallel processor. It provides a coherent cache with the reduced hierarchical bit-map directory scheme to achieve cost effective and high performance management. Messages for coherent cache are transferred through a fat tree on the RDT (Recursive Diagonal Torus) interconnection network. The JUMP-1 router supports versatile functions including multicast and acknowledge combining for the reduced hierarchical bit-map directory scheme.

Original language	English
Pages (from-to)	158-164
Number of pages	7
Journal	Conference Proceedings - International Phoenix Conference on Computers and Communications
Publication status	Published - 1996 Jan 1
Event	Proceedings of the 1996 IEEE 15th Annual International Phoenix Conference on Computers and Communications - Scottsdale, AZ, USA Duration: 1996 Mar 27 → 1996 Mar 29

ASJC Scopus subject areas

Computer Science(all)

Cite this

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abstract = "JUMP-1 is currently under development by seven Japanese universities to establish techniques of an efficient distributed shared memory on a massively parallel processor. It provides a coherent cache with the reduced hierarchical bit-map directory scheme to achieve cost effective and high performance management. Messages for coherent cache are transferred through a fat tree on the RDT (Recursive Diagonal Torus) interconnection network. The JUMP-1 router supports versatile functions including multicast and acknowledge combining for the reduced hierarchical bit-map directory scheme.",

author = "Hiroaki Nishi and Katsunobu Nishimura and Anjo, {Ken ichiro} and Tomohiro Kudoh and Hideharu Amano",

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AU - Nishimura, Katsunobu

AU - Anjo, Ken ichiro

AU - Kudoh, Tomohiro

AU - Amano, Hideharu

PY - 1996/1/1

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AB - JUMP-1 is currently under development by seven Japanese universities to establish techniques of an efficient distributed shared memory on a massively parallel processor. It provides a coherent cache with the reduced hierarchical bit-map directory scheme to achieve cost effective and high performance management. Messages for coherent cache are transferred through a fat tree on the RDT (Recursive Diagonal Torus) interconnection network. The JUMP-1 router supports versatile functions including multicast and acknowledge combining for the reduced hierarchical bit-map directory scheme.

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AN - SCOPUS:0029700410

SN - 0896-582X

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JF - Conference Proceedings - International Phoenix Conference on Computers and Communications

Y2 - 27 March 1996 through 29 March 1996

ER -

JUMP-1 router chip: A versatile router for supporting a distributed shared memory

Abstract

ASJC Scopus subject areas

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