Level-Shifter-Less Approach for Multi-VDD SoC Design to Employ Body Bias Control in FD-SOI

Kimiyoshi Usami; Shunsuke Kogure; Yusuke Yoshida; Ryo Magasaki; Hideharu Amano

doi:10.1007/978-3-030-15663-3_1

Level-Shifter-Less Approach for Multi-V_DD SoC Design to Employ Body Bias Control in FD-SOI

Kimiyoshi Usami, Shunsuke Kogure, Yusuke Yoshida, Ryo Magasaki, Hideharu Amano

Department of Information and Computer Science

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Abstract

Level shifters to convert signal swings from low-voltage (VDDL) to high-voltage (VDDH) are required at the boundary of voltage domains in SoC employing multiple supply voltages. However, they cost delay, power and area in addition to increasing the complexity of physical design. This paper proposes a level-shifter-less (LSL) approach to use a reverse body bias (RBB) at pMOS transistors in the VDDH domain and superior threshold-voltage modulation capability of FD-SOI devices. Simulation results and measurements of a fabricated chip showed that the chip applying the LSL approach correctly operates at VDDL = 0.6 V and VDDH = 1.2 V under 2 V pMOS RBB while suppressing the static dc current in the VDDH domain. We also demonstrate that adaptive RBB control for pMOS can maintain effectiveness of this approach under process and temperature variations.

Original language	English
Title of host publication	VLSI-SoC
Subtitle of host publication	Opportunities and Challenges Beyond the Internet of Things - 25th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2017, Revised and Extended Selected Papers
Editors	Michail Maniatakos, Ibrahim Abe M. Elfadel, Matteo Sonza Reorda, H. Fatih Ugurdag, José Monteiro, Ricardo Reis
Publisher	Springer New York LLC
Pages	1-21
Number of pages	21
ISBN (Print)	9783030156626
DOIs	https://doi.org/10.1007/978-3-030-15663-3_1
Publication status	Published - 2019
Event	25th IFIP/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2017 - Abu Dhabi, United Arab Emirates Duration: 2017 Oct 23 → 2017 Oct 25

Publication series

Name	IFIP Advances in Information and Communication Technology
Volume	500
ISSN (Print)	1868-4238
ISSN (Electronic)	1868-422X

Other

Other	25th IFIP/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2017
Country/Territory	United Arab Emirates
City	Abu Dhabi
Period	17/10/23 → 17/10/25

Keywords

Body bias control
FD-SOI
Level shifter
Low power
Multi-VDD design
Variations

ASJC Scopus subject areas

Information Systems
Computer Networks and Communications
Information Systems and Management

Access to Document

10.1007/978-3-030-15663-3_1

Cite this

Usami, K., Kogure, S., Yoshida, Y., Magasaki, R., & Amano, H. (2019). Level-Shifter-Less Approach for Multi-V_DD SoC Design to Employ Body Bias Control in FD-SOI. In M. Maniatakos, I. A. M. Elfadel, M. Sonza Reorda, H. F. Ugurdag, J. Monteiro, & R. Reis (Eds.), VLSI-SoC: Opportunities and Challenges Beyond the Internet of Things - 25th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2017, Revised and Extended Selected Papers (pp. 1-21). (IFIP Advances in Information and Communication Technology; Vol. 500). Springer New York LLC. https://doi.org/10.1007/978-3-030-15663-3_1

Level-Shifter-Less Approach for Multi-V_DD SoC Design to Employ Body Bias Control in FD-SOI. / Usami, Kimiyoshi; Kogure, Shunsuke; Yoshida, Yusuke et al.
VLSI-SoC: Opportunities and Challenges Beyond the Internet of Things - 25th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2017, Revised and Extended Selected Papers. ed. / Michail Maniatakos; Ibrahim Abe M. Elfadel; Matteo Sonza Reorda; H. Fatih Ugurdag; José Monteiro; Ricardo Reis. Springer New York LLC, 2019. p. 1-21 (IFIP Advances in Information and Communication Technology; Vol. 500).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Usami, K, Kogure, S, Yoshida, Y, Magasaki, R & Amano, H 2019, Level-Shifter-Less Approach for Multi-V_DD SoC Design to Employ Body Bias Control in FD-SOI. in M Maniatakos, IAM Elfadel, M Sonza Reorda, HF Ugurdag, J Monteiro & R Reis (eds), VLSI-SoC: Opportunities and Challenges Beyond the Internet of Things - 25th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2017, Revised and Extended Selected Papers. IFIP Advances in Information and Communication Technology, vol. 500, Springer New York LLC, pp. 1-21, 25th IFIP/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2017, Abu Dhabi, United Arab Emirates, 17/10/23. https://doi.org/10.1007/978-3-030-15663-3_1

Usami K, Kogure S, Yoshida Y, Magasaki R, Amano H. Level-Shifter-Less Approach for Multi-V_DD SoC Design to Employ Body Bias Control in FD-SOI. In Maniatakos M, Elfadel IAM, Sonza Reorda M, Ugurdag HF, Monteiro J, Reis R, editors, VLSI-SoC: Opportunities and Challenges Beyond the Internet of Things - 25th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2017, Revised and Extended Selected Papers. Springer New York LLC. 2019. p. 1-21. (IFIP Advances in Information and Communication Technology). doi: 10.1007/978-3-030-15663-3_1

Usami, Kimiyoshi ; Kogure, Shunsuke ; Yoshida, Yusuke et al. / Level-Shifter-Less Approach for Multi-V_DD SoC Design to Employ Body Bias Control in FD-SOI. VLSI-SoC: Opportunities and Challenges Beyond the Internet of Things - 25th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2017, Revised and Extended Selected Papers. editor / Michail Maniatakos ; Ibrahim Abe M. Elfadel ; Matteo Sonza Reorda ; H. Fatih Ugurdag ; José Monteiro ; Ricardo Reis. Springer New York LLC, 2019. pp. 1-21 (IFIP Advances in Information and Communication Technology).

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