Asymmetric body bias control technique is proposed and evaluated. Compared to the conventional symmetric body bias control, the proposed technique provides finer performance control. Real chip measurements proved the feasibility of leakage reduction when asymmetric body bias is employed. In our measurement, 22.3% of leakage reduction is achieved when compared to the conventional body bias control. Our work also considers the practical on-chip body bias generator and proposed a technique which can be available with the body bias generator.
|Title of host publication
|Proceedings for 2017 IEEE Symposium on Low-Power and High-Speed Chips, COOL Chips 2017
|Institute of Electrical and Electronics Engineers Inc.
|Published - 2017 Jun 12
|20th IEEE Symposium on Low-Power and High-Speed Chips, COOL Chips 2017 - Yokohama, Japan
Duration: 2017 Apr 19 → 2017 Apr 21
|20th IEEE Symposium on Low-Power and High-Speed Chips, COOL Chips 2017
|17/4/19 → 17/4/21
ASJC Scopus subject areas
- Hardware and Architecture
- Electrical and Electronic Engineering