TY - JOUR
T1 - Multilevel inverter topology using current path change for zero current switching
AU - Sugimoto, Tomoya
AU - Nozaki, Takahiro
AU - Murakami, Toshiyuki
N1 - Funding Information:
Future work includes to reduce capacitance and to improve a limited switching frequency. Owing to the proposed topology which uses a charge pump structure, the capacitors charge and discharge repetitively with the output voltage frequency or the switching frequency. Hence, the proposed topology needs large capacitances. In addition, some steps are required when the conduction path changes, which makes the transition longer. In order to solve these problems, in the future, the switching pattern will be improved to reduce the number of steps. Acknowledgment This research was supported in part by the Ministry of Education, Culture, Sports, Science and Technology of Japan under Grant-in-Aid for Encouragement of Young Scientists (A), 16H06079, 2016.
Publisher Copyright:
© 2019 The Institute of Electrical Engineers of Japan.
PY - 2019
Y1 - 2019
N2 - In motor drive applications, a high switching frequency is required to mitigate current harmonics, which cause a copper loss. However, the high switching frequency makes the switching loss large. Hence, some switching loss reduction techniques have been studied in the past. These techniques have some problems. This paper proposes a multilevel inverter topology for switching loss reduction. Because of provision of multiple current paths, the proposed inverter realizes the zero current switching. Consequently, a loss of the whole system including an inverter and motor can be reduced with a higher switching frequency. The switching loss of the proposed inverter is smaller than that of the conventional one. It was verified that the proposed inverter has some advantages at high switching frequency, through calculations.
AB - In motor drive applications, a high switching frequency is required to mitigate current harmonics, which cause a copper loss. However, the high switching frequency makes the switching loss large. Hence, some switching loss reduction techniques have been studied in the past. These techniques have some problems. This paper proposes a multilevel inverter topology for switching loss reduction. Because of provision of multiple current paths, the proposed inverter realizes the zero current switching. Consequently, a loss of the whole system including an inverter and motor can be reduced with a higher switching frequency. The switching loss of the proposed inverter is smaller than that of the conventional one. It was verified that the proposed inverter has some advantages at high switching frequency, through calculations.
KW - Bidirectional switch
KW - Multilevel inverter
KW - Switching loss
KW - Topology
KW - Zero current switching
UR - http://www.scopus.com/inward/record.url?scp=85064830818&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=85064830818&partnerID=8YFLogxK
U2 - 10.1541/ieejjia.8.250
DO - 10.1541/ieejjia.8.250
M3 - Article
AN - SCOPUS:85064830818
SN - 2187-1094
VL - 8
SP - 250
EP - 255
JO - IEEJ Journal of Industry Applications
JF - IEEJ Journal of Industry Applications
IS - 2
ER -