New block demodulator with an automatic equalizer

Minoru Matsui, Masafumi Hagiwara, Masao Nakagawa

Research output: Contribution to journalConference articlepeer-review

1 Citation (Scopus)

Abstract

A block demodulator with an automatic equalizer is proposed. A new complex block equalizer that uses a direct algorithm based on the minimum-mean-square-error criterion is utilized to make the most of the block demodulation. The speed of convergence can be increased by changing the number of taps in the automatic equalizer. Computer simulation shows that the proposed system has superior performance compared with the conventional block demodulators. For example, the mean square error of the data in the proposed block demodulator becomes 1/100 of that in the conventional system at SNR = 30 dB.

Original languageEnglish
Pages (from-to)1827-1830
Number of pages4
JournalProceedings - IEEE International Symposium on Circuits and Systems
Volume3
Publication statusPublished - 1989 Dec 1
EventIEEE International Symposium on Circuits and Systems 1989, the 22nd ISCAS. Part 1 - Portland, OR, USA
Duration: 1989 May 81989 May 11

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

Fingerprint

Dive into the research topics of 'New block demodulator with an automatic equalizer'. Together they form a unique fingerprint.

Cite this