Optimization and control of VDD and VTH for low-power, high-speed CMOS design

Tadahiro Kuroda

doi:10.1145/774572.774577

Optimization and control of V_DD and V_TH for low-power, high-speed CMOS design

Tadahiro Kuroda

Research output: Contribution to journal › Conference article › peer-review

15 Citations (Scopus)

Abstract

It is essential to control V_DD and V_TH for low-power, high-speed CMOS design. In this paper, it is shown that these two parameters can be controlled by designers as objectives of design optimization to find better trade-offs between power and speed. Quantitative analysis of trade-offs between power and speed is presented. Some of the popular circuit techniques and design examples to control V_DD and V_TH are introduced. A simple theory to compute optimum multiple V_DD's and V_TH's is described. Scaling scenarios of variable and/or multiple V_DD's and V_TH's is discussed to show future technology directions.

Original language	English
Pages (from-to)	28-34
Number of pages	7
Journal	IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers
DOIs	https://doi.org/10.1145/774572.774577
Publication status	Published - 2002
Externally published	Yes
Event	IEEE/ACM International Conference on Computer Aided Design (ICCAD) - San Jose, CA, United States Duration: 2002 Nov 10 → 2002 Nov 14

ASJC Scopus subject areas

Software
Computer Science Applications
Computer Graphics and Computer-Aided Design

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10.1145/774572.774577

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@article{f300383af58f4ddbb1a946680850b290,

title = "Optimization and control of VDD and VTH for low-power, high-speed CMOS design",

abstract = "It is essential to control VDD and VTH for low-power, high-speed CMOS design. In this paper, it is shown that these two parameters can be controlled by designers as objectives of design optimization to find better trade-offs between power and speed. Quantitative analysis of trade-offs between power and speed is presented. Some of the popular circuit techniques and design examples to control VDD and VTH are introduced. A simple theory to compute optimum multiple VDD's and VTH's is described. Scaling scenarios of variable and/or multiple VDD's and VTH's is discussed to show future technology directions.",

author = "Tadahiro Kuroda",

year = "2002",

doi = "10.1145/774572.774577",

language = "English",

pages = "28--34",

journal = "IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers",

issn = "1092-3152",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

note = "IEEE/ACM International Conference on Computer Aided Design (ICCAD) ; Conference date: 10-11-2002 Through 14-11-2002",

}

TY - JOUR

T1 - Optimization and control of VDD and VTH for low-power, high-speed CMOS design

AU - Kuroda, Tadahiro

PY - 2002

Y1 - 2002

N2 - It is essential to control VDD and VTH for low-power, high-speed CMOS design. In this paper, it is shown that these two parameters can be controlled by designers as objectives of design optimization to find better trade-offs between power and speed. Quantitative analysis of trade-offs between power and speed is presented. Some of the popular circuit techniques and design examples to control VDD and VTH are introduced. A simple theory to compute optimum multiple VDD's and VTH's is described. Scaling scenarios of variable and/or multiple VDD's and VTH's is discussed to show future technology directions.

AB - It is essential to control VDD and VTH for low-power, high-speed CMOS design. In this paper, it is shown that these two parameters can be controlled by designers as objectives of design optimization to find better trade-offs between power and speed. Quantitative analysis of trade-offs between power and speed is presented. Some of the popular circuit techniques and design examples to control VDD and VTH are introduced. A simple theory to compute optimum multiple VDD's and VTH's is described. Scaling scenarios of variable and/or multiple VDD's and VTH's is discussed to show future technology directions.

UR - http://www.scopus.com/inward/record.url?scp=0036916198&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=0036916198&partnerID=8YFLogxK

U2 - 10.1145/774572.774577

DO - 10.1145/774572.774577

M3 - Conference article

AN - SCOPUS:0036916198

SN - 1092-3152

SP - 28

EP - 34

JO - IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers

JF - IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers

T2 - IEEE/ACM International Conference on Computer Aided Design (ICCAD)

Y2 - 10 November 2002 through 14 November 2002

ER -

Optimization and control of V_DD and V_TH for low-power, high-speed CMOS design

Abstract

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