Abstract
Introducing a magnetic tunneling junction (MTJ) into a flip-flop enables nonvolatile power gating (PG) but large store energy to MTJ is a critical concern. We propose an optimized two-step store (TSS) control to first perform a short store with an optimal time for all nonvolatile flip-flops (NVFFs) and then perform a long store only at the failed ones for reducing the store energy. As the key technologies to realize this, we present a verify-and-retryable NVFF (VR-NVFF) circuit enabling the TSS control and an analytical expression for the optimal short-store time (Tshort_opt) minimizing the store energy. To examine the effectiveness of the optimized TSS control and the validity of analytically derived Tshortopt, we implemented the TSS control on a coarse-grained reconfigurable array (CGRA)-based accelerator chip and fabricated it in a 40-nm CMOS/MTJ hybrid process technology. Results demonstrated that analytical Tshortopt showed a good agreement with the measured value (within 8% difference) under process and temperature variations. The TSS control with Tshortopt reduced the store energy to 0.32× of that of the conventional long-store-only technique. The break-even time (BET), which is the minimum power-gating time to get the gain in energy savings, was shortened to 0.51 0.7× by the TSS control, achieving the BET of 50 923 μ s in the range of 0 °C 80 °C.
| Original language | English |
|---|---|
| Pages (from-to) | 89-102 |
| Number of pages | 14 |
| Journal | IEEE Transactions on Very Large Scale Integration (VLSI) Systems |
| Volume | 32 |
| Issue number | 1 |
| DOIs | |
| Publication status | Published - 2024 Jan 1 |
Keywords
- Analytical expression
- energy minimization
- magnetic tunneling junction (MTJ)
- nonvolatile flip-flop (NVFF)
- power gating (PG)
- process variation
- store energy
- temperature variation
ASJC Scopus subject areas
- Software
- Hardware and Architecture
- Electrical and Electronic Engineering
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