Abstract
We describe the basic architecture of JUMP-1, an MPP prototype developed by collaboration between 7 universities. The proposed architecture can exploit high performance of coarse-grained RISC processor performance in connection with flexible fine-grained operation such as distributed shared memory, versatile synchronization and message communications.
Original language | English |
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Pages | 427-434 |
Number of pages | 8 |
Publication status | Published - 1994 |
Externally published | Yes |
Event | Proceedings of the International Symposium on Parallel Architectures, Algorithms and Networks (ISPAN) - Kanazawa, Jpn Duration: 1994 Dec 14 → 1994 Dec 16 |
Other
Other | Proceedings of the International Symposium on Parallel Architectures, Algorithms and Networks (ISPAN) |
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City | Kanazawa, Jpn |
Period | 94/12/14 → 94/12/16 |
ASJC Scopus subject areas
- Computer Science(all)