In this paper, the first systematic study of Vth variations (σVth) and Idsat variations (σI dsat) in (110) n/pMOSFETs is presented. σVth in (110) n/pFETs with high channel dose are larger than (100) n/pFETs. It is found that the variations of B ion channeling, B-induced interface traps, and As-induced interface fixed charges enhance σVth in (110) n/pFETs. Steep B profile and moderate P doping into the surface are desirable to minimize σVth in (110) FETs. We also found that σI dsat is determined by both σVth and the degree of velocity saturation. σIdsat of scaled (110) CMOS can be lowered compared to (100) CMOS by the optimum channel impurity design.