pSAS/c: Pseudo Set Associative and Shared with Competitive Cache

Keisuke Inoue, Hideharu Amano

Research output: Contribution to journalArticlepeer-review


Today, low-cost, high-performance processors are required in many products such as portable terminals and network appliances, and the demand for on-chip multiprocessors is increasing. The authors have proposed a semi-shared pseudo set associative cache for on-chip multiprocessors, or pSAS, which offers both high speed of the snoop cache and on-chip cache memory efficiency of the shared cache. Although pSAS can directly access other caches with some delay, its performance deteriorates if it continues to access other caches. In this article, we propose the pSAS/c cache that solves this problem by copying frequently accessed data into self-cache and accessing it as fast as the snoop cache.

Original languageEnglish
Pages (from-to)76-84
Number of pages9
JournalElectronics and Communications in Japan, Part II: Electronics (English translation of Denshi Tsushin Gakkai Ronbunshi)
Issue number9
Publication statusPublished - 2003 Sept


  • On-chip multiprocessor
  • Pseudo set associative cache
  • Snoop cache
  • pSAS cache

ASJC Scopus subject areas

  • Physics and Astronomy(all)
  • Computer Networks and Communications
  • Electrical and Electronic Engineering


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