Reducing memory system energy by software-controlled on-chip memory

Masaaki Kondo, Hiroshi Nakamura

Research output: Contribution to journalArticlepeer-review

1 Citation (Scopus)

Abstract

In recent computer systems, a large portion of energy is consumed by on-chip cache accesses and data movement between cache and off-chip main memory. Reducing these memory system energy is indispensable for future microprocessors because power and thermal issues certainty become a key factor of limiting processor performance. In this paper, we discuss and evaluate how our architecture called SCIMA contributes to energy saving. SCIMA integrates software-controllable memory (SCM) into processor chip. SCIMA can save total memory system energy by using SCM under the support of compiler. The evaluation results reveal that SCIMA can reduce 5-50% of memory system energy and still faster than conventional cache based architecture.

Original languageEnglish
Pages (from-to)580-588
Number of pages9
JournalIEICE Transactions on Electronics
VolumeE86-C
Issue number4
Publication statusPublished - 2003 Apr
Externally publishedYes

Keywords

  • Cache
  • Memory traffic
  • On-chip memory
  • Processor architecture
  • Way activation

ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Electrical and Electronic Engineering

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