RT-libSGM: FPGA-Oriented Real-Time Stereo Matching System with High Scalability

Kaijie Wei, Yuki Kuno, Masatoshi Arai, Hideharu Amano

Research output: Contribution to journalArticlepeer-review


Stereo depth estimation has become an attractive topic in the computer vision field. Although various algorithms strive to optimize the speed and the precision of estimation, the energy cost of a system is also an essential metric for an embedded system. Among these various algorithms, Semi-Global Matching (SGM) has been a popular choice for some real-world applications because of its accuracy-and-speed balance. However, its power consumption makes it difficult to be applied to an embedded system. Thus, we propose a robust stereo matching system, RT-libSGM, working on the Xilinx Field-Programmable Gate Array (FPGA) platforms. The dedicated design of each module optimizes the speed of the entire system while ensuring the flexibility of the system structure. Through an evaluation on a Zynq FPGA board called M-KUBOS, RT-libSGM achieves state-of-the-art performance with lower power consumption. Compared with the benchmark design (libSGM) working on the Tegra X2 GPU, RTlibSGM runs more than 2× faster at a much lower energy cost.

Original languageEnglish
Pages (from-to)337-348
Number of pages12
JournalIEICE Transactions on Information and Systems
Issue number3
Publication statusPublished - 2023 Mar


  • energy efficiency
  • libSGM
  • real-time
  • slide window
  • stereo matching
  • vitis HLS

ASJC Scopus subject areas

  • Software
  • Hardware and Architecture
  • Computer Vision and Pattern Recognition
  • Electrical and Electronic Engineering
  • Artificial Intelligence


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