Abstract
Processor performance has been improved due to clock acceleration and ILP extraction techniques. Performance of main memory, however, has not been improved so much. The performance gap between processor and memory will be growing further in the future. This is very serious problem in high performance computing because effective performance is limited by memory ability in most cases. In order to overcome this problem, we propose a new VLSI architecture called SCIMA which integrates software controllable memory into a processor chip. Most of data access is regular in high performance computing. The software controllable memory is more suitable for making good use of the regularity than conventional cache. This paper presents its architecture and performance evaluation. The evaluation results reveal the superiority of SCIMA compared with conventional cache-based architecture.
Original language | English |
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Pages | 105-111 |
Number of pages | 7 |
Publication status | Published - 2000 |
Externally published | Yes |
Event | 2000 International Conference on Computer Design - Austin, TX, USA Duration: 2000 Sept 17 → 2000 Sept 20 |
Conference
Conference | 2000 International Conference on Computer Design |
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City | Austin, TX, USA |
Period | 00/9/17 → 00/9/20 |
ASJC Scopus subject areas
- Hardware and Architecture
- Electrical and Electronic Engineering