TY - GEN
T1 - Software environment for WASMII
T2 - 4th International Workshop on Field-Programmable Logic and Applications, FPL 1994
AU - Chen, Xiao Yu
AU - Ling, Xiao Ping
AU - Amano, Hidcharu
N1 - Publisher Copyright:
© Springer-Verlag Berlin Heidelberg 1994.
PY - 1994
Y1 - 1994
N2 - A data driven computer WASMII which exploits dynamically reconfigurable FPGAs based on a virtual haxdwaxe has been developed. This paper presents a software system which automatically generates a configuration data for FPGAs used in the WASMII. In this system, an application program is edited as a dataflow graph with a user interface, and divided into a set of subgraphs each of them is corresponding to the configuration data of an FPGA chip. These subgraphs axe translated into program modules described in a hardware description language called the SFL. From the SFL programs, a logic synthesis tool PARTHENON generates a net-list of logic circuits for the subgraphs. Finally, the net-list is translated again for the Xilinx’s CAD system: and the configuration data is generated. Here, the ordinary differential equation solver is presented as an example, and the number of gates is evaluated.
AB - A data driven computer WASMII which exploits dynamically reconfigurable FPGAs based on a virtual haxdwaxe has been developed. This paper presents a software system which automatically generates a configuration data for FPGAs used in the WASMII. In this system, an application program is edited as a dataflow graph with a user interface, and divided into a set of subgraphs each of them is corresponding to the configuration data of an FPGA chip. These subgraphs axe translated into program modules described in a hardware description language called the SFL. From the SFL programs, a logic synthesis tool PARTHENON generates a net-list of logic circuits for the subgraphs. Finally, the net-list is translated again for the Xilinx’s CAD system: and the configuration data is generated. Here, the ordinary differential equation solver is presented as an example, and the number of gates is evaluated.
UR - http://www.scopus.com/inward/record.url?scp=0142099216&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=0142099216&partnerID=8YFLogxK
U2 - 10.1007/3-540-58419-6_91
DO - 10.1007/3-540-58419-6_91
M3 - Conference contribution
AN - SCOPUS:0142099216
SN - 9783540584193
T3 - Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
SP - 208
EP - 219
BT - Field-Programmable Logic
A2 - Hartenstein, Reiner W.
A2 - Servit, Michal Z.
PB - Springer Verlag
Y2 - 7 September 1994 through 9 September 1994
ER -