Abstract
Scaling of CMOS Integrated Circuit is becoming difficult, due mainly to rapid increase in power dissipation. How will the semiconductor technology and industry develop" This paper discusses challenges and opportunities in system LSI from three levels of perspectives: transistor level (physics), IC level (electronics), and business level (economics).
Original language | English |
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Pages (from-to) | 213-220 |
Number of pages | 8 |
Journal | IEICE Transactions on Electronics |
Volume | E89-C |
Issue number | 3 |
DOIs | |
Publication status | Published - 2006 |
Externally published | Yes |
Keywords
- CMOS
- Communications
- Computing
- IC design
- Power aware
- Scaling
ASJC Scopus subject areas
- Electronic, Optical and Magnetic Materials
- Electrical and Electronic Engineering