Abstract
We have analyzed 3D thermal stress profile under TCT using multi-physics solver for SiC power device heat dissipation structures with a direct chip bonding on Cu plate by Ag sintered layer. The results showed that the maximum stress value in SiC chip structure is higher than that in Si chip structure. This is because Young's modulus of SiC is higher than that of Si. The maximum stress point is at the corner of Ag sintered bonding layer for both SiC/Si structures. This bonding layer corner value increases as Cu plate thickness becomes thicker. It was also found that at Ag sintered layer center von Mises stress and the shear stress are almost the same, and at Ag sintered layer corner the normal stress is major component of von Mises stress.
Original language | English |
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Title of host publication | 2017 International Conference on Electronics Packaging, ICEP 2017 |
Publisher | Institute of Electrical and Electronics Engineers Inc. |
Pages | 544-548 |
Number of pages | 5 |
ISBN (Electronic) | 9784990218836 |
DOIs | |
Publication status | Published - 2017 Jun 5 |
Event | 2017 International Conference on Electronics Packaging, ICEP 2017 - Tendo, Yamagata, Japan Duration: 2017 Apr 19 → 2017 Apr 22 |
Other
Other | 2017 International Conference on Electronics Packaging, ICEP 2017 |
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Country/Territory | Japan |
City | Tendo, Yamagata |
Period | 17/4/19 → 17/4/22 |
Keywords
- Ag sintering chip-attachment
- anisotropic material parameter
- multi-physics solver
- power semiconductor devices
- SiC chip system
- stress and strain analysis
ASJC Scopus subject areas
- Electrical and Electronic Engineering
- Industrial and Manufacturing Engineering
- Electronic, Optical and Magnetic Materials