Throughput enhancement strategy of maskless electron beam direct writing for logic device

R. Inanami; S. Magoshi; S. Kousai; M. Hamada; T. Takayanagi; K. Sugihara; K. Okumura; T. Kuroda

Throughput enhancement strategy of maskless electron beam direct writing for logic device

R. Inanami, S. Magoshi, S. Kousai, M. Hamada, T. Takayanagi, K. Sugihara, K. Okumura, T. Kuroda

Research output: Contribution to journal › Conference article › peer-review

Abstract

A pattern design method for semiconductor circuits in logic device was developed, which realized an electron beam (EB) exposure with sufficient throughput. The number of EB shots can be decreased by repeating logic synthesis and P&R (place and route) by removing usable standard cells (SCs). By using the design method, a functional block with about 140 kGates could be generated with only 17 SCs, and the minimum number of EB shots was attained with 24 SCs. The increase in the total area of SCs and the consumed power of the chip was only 10%.

Original language	English
Pages (from-to)	833-836
Number of pages	4
Journal	Technical Digest - International Electron Devices Meeting
Publication status	Published - 2000 Dec 1
Externally published	Yes
Event	2000 IEEE International Electron Devices Meeting - San Francisco, CA, United States Duration: 2000 Dec 10 → 2000 Dec 13

ASJC Scopus subject areas

Electronic, Optical and Magnetic Materials
Condensed Matter Physics
Electrical and Electronic Engineering
Materials Chemistry

Cite this

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title = "Throughput enhancement strategy of maskless electron beam direct writing for logic device",

abstract = "A pattern design method for semiconductor circuits in logic device was developed, which realized an electron beam (EB) exposure with sufficient throughput. The number of EB shots can be decreased by repeating logic synthesis and P&R (place and route) by removing usable standard cells (SCs). By using the design method, a functional block with about 140 kGates could be generated with only 17 SCs, and the minimum number of EB shots was attained with 24 SCs. The increase in the total area of SCs and the consumed power of the chip was only 10%.",

author = "R. Inanami and S. Magoshi and S. Kousai and M. Hamada and T. Takayanagi and K. Sugihara and K. Okumura and T. Kuroda",

year = "2000",

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day = "1",

language = "English",

pages = "833--836",

journal = "Technical Digest - International Electron Devices Meeting",

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publisher = "Institute of Electrical and Electronics Engineers Inc.",

note = "2000 IEEE International Electron Devices Meeting ; Conference date: 10-12-2000 Through 13-12-2000",

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TY - JOUR

T1 - Throughput enhancement strategy of maskless electron beam direct writing for logic device

AU - Inanami, R.

AU - Magoshi, S.

AU - Kousai, S.

AU - Hamada, M.

AU - Takayanagi, T.

AU - Sugihara, K.

AU - Okumura, K.

AU - Kuroda, T.

PY - 2000/12/1

Y1 - 2000/12/1

N2 - A pattern design method for semiconductor circuits in logic device was developed, which realized an electron beam (EB) exposure with sufficient throughput. The number of EB shots can be decreased by repeating logic synthesis and P&R (place and route) by removing usable standard cells (SCs). By using the design method, a functional block with about 140 kGates could be generated with only 17 SCs, and the minimum number of EB shots was attained with 24 SCs. The increase in the total area of SCs and the consumed power of the chip was only 10%.

AB - A pattern design method for semiconductor circuits in logic device was developed, which realized an electron beam (EB) exposure with sufficient throughput. The number of EB shots can be decreased by repeating logic synthesis and P&R (place and route) by removing usable standard cells (SCs). By using the design method, a functional block with about 140 kGates could be generated with only 17 SCs, and the minimum number of EB shots was attained with 24 SCs. The increase in the total area of SCs and the consumed power of the chip was only 10%.

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M3 - Conference article

AN - SCOPUS:0034454065

SN - 0163-1918

SP - 833

EP - 836

JO - Technical Digest - International Electron Devices Meeting

JF - Technical Digest - International Electron Devices Meeting

T2 - 2000 IEEE International Electron Devices Meeting

Y2 - 10 December 2000 through 13 December 2000

ER -

Throughput enhancement strategy of maskless electron beam direct writing for logic device

Abstract

ASJC Scopus subject areas

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