TY - JOUR
T1 - Time-Based Current Source
T2 - A Highly Digital Robust Current Generator for Switched Capacitor Circuits
AU - Yoshioka, Kentaro
N1 - Funding Information:
This work was supported in part by the JST CREST progra-munder Grant JPMJCR21D2, and in part by the Japan Society or the Promotion of Science (JSPS) KAKENHI, under Grant21K20413.
Publisher Copyright:
Copyright © 2022 The Institute of Electronics, Information and Communication Engineers.
PY - 2022/7
Y1 - 2022/7
N2 - The resistor variation can severely affect current reference sources, which may vary up to ±40% in scaled CMOS processes. In addition, such variations make the opamp design challenging and increase the design margin, impacting power consumption. This paper proposes a Time-Based Current Source (TBCS): a robust and process-scalable reference current source suitable for switched-capacitor (SC) circuits. We construct a delay-locked-loop (DLL) to lock the current-starved inverter with the reference clock, enabling the use of the settled current directly as a reference current. Since the load capacitors determine the delay, the generated current is decoupled from resistor values and enables a robust reference current source. The prototype TBCS fabricated in 28 nm CMOS achieved a minimal area of 1200 um2. The current variation is suppressed to half compared to BGR based current sources, confirmed in extensive PVT variation simulations. Moreover, when used as the opamp's bias, TBCS achieves comparable opamp GBW to an ideal current source.
AB - The resistor variation can severely affect current reference sources, which may vary up to ±40% in scaled CMOS processes. In addition, such variations make the opamp design challenging and increase the design margin, impacting power consumption. This paper proposes a Time-Based Current Source (TBCS): a robust and process-scalable reference current source suitable for switched-capacitor (SC) circuits. We construct a delay-locked-loop (DLL) to lock the current-starved inverter with the reference clock, enabling the use of the settled current directly as a reference current. Since the load capacitors determine the delay, the generated current is decoupled from resistor values and enables a robust reference current source. The prototype TBCS fabricated in 28 nm CMOS achieved a minimal area of 1200 um2. The current variation is suppressed to half compared to BGR based current sources, confirmed in extensive PVT variation simulations. Moreover, when used as the opamp's bias, TBCS achieves comparable opamp GBW to an ideal current source.
KW - DLL
KW - current reference
KW - process scalable
KW - switched capacitor circuits
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U2 - 10.1587/transele.2021CDP0002
DO - 10.1587/transele.2021CDP0002
M3 - Article
AN - SCOPUS:85139340345
SN - 0916-8524
VL - E105.C
SP - 324
EP - 333
JO - IEICE Transactions on Electronics
JF - IEICE Transactions on Electronics
IS - 7
ER -