Trax solver on Zynq with Deep Q-Network

Naru Sugimoto, Takuji Mitsuishi, Takahiro Kaneda, Chiharu Tsuruta, Ryotaro Sakai, Hideki Shimura, Hideharu Amano

Research output: Chapter in Book/Report/Conference proceedingConference contribution

7 Citations (Scopus)


A software/hardware co-design system for a Trax solver is proposed. Implementation of Trax AI is challenging due to its complicated rules, so we adopted an embedded system called Zynq (Zynq-7000 AP SoC) and introduced a High Level Synthesis (HLS) design. We also added Deep Q-Network, a machine learning algorithm, to the system for use as an evaluation function. Our solver automatically optimizes its own evaluation function through games with humans or other AIs. The implemented solver works with a 150-MHz clock on the Xilinx XC7Z020-CLG484 of a Digilent ZedBoard. A part of the Deep Q-Network job can be executed on the FPGA of the Zynq board more than 26 times faster than with ARM Coretex-A9 650-MHz software.

Original languageEnglish
Title of host publication2015 International Conference on Field Programmable Technology, FPT 2015
PublisherInstitute of Electrical and Electronics Engineers Inc.
Number of pages4
ISBN (Print)9781467390910
Publication statusPublished - 2016 Jan 25
EventInternational Conference on Field Programmable Technology, FPT 2015 - Queenstown, New Zealand
Duration: 2015 Dec 72015 Dec 9


OtherInternational Conference on Field Programmable Technology, FPT 2015
Country/TerritoryNew Zealand

ASJC Scopus subject areas

  • Computer Science Applications
  • Hardware and Architecture
  • Software


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