Understanding of short-channel mobility in Tri-Gate nanowire MOSFETs and enhanced stress memorization technique for performance improvement

Masumi Saitoh; Yukio Nakabayashi; Kensuke Ota; Ken Uchida; Toshinori Numata

doi:10.1109/IEDM.2010.5703475

Understanding of short-channel mobility in Tri-Gate nanowire MOSFETs and enhanced stress memorization technique for performance improvement

Masumi Saitoh, Yukio Nakabayashi, Kensuke Ota, Ken Uchida, Toshinori Numata

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

13 Citations (Scopus)

Abstract

We systematically studied short-channel mobility (μ) in SOI nanowire transistors (NW Tr.). The strain induced in the NW channel dominates short-L μ. μ of short-L 〈110〉 NW nFETs largely increases due to vertical compressive strain. We achieved further strain enhancement in NW channel by stress memorization technique (SMT). μ increase by SMT is much larger in NW Tr. than in planar Tr. In 〈110〉 NW nFETs, I_on on the same DIBL increases by as much as 58% by SMT thanks to significant R_SD reduction in addition to μ increase, while I_on degradation of pFETs is minimal.

Original language	English
Title of host publication	2010 IEEE International Electron Devices Meeting, IEDM 2010
Pages	34.3.1-34.3.4
DOIs	https://doi.org/10.1109/IEDM.2010.5703475
Publication status	Published - 2010
Externally published	Yes
Event	2010 IEEE International Electron Devices Meeting, IEDM 2010 - San Francisco, CA, United States Duration: 2010 Dec 6 → 2010 Dec 8

Publication series

Name	Technical Digest - International Electron Devices Meeting, IEDM
ISSN (Print)	0163-1918

Other

Other	2010 IEEE International Electron Devices Meeting, IEDM 2010
Country/Territory	United States
City	San Francisco, CA
Period	10/12/6 → 10/12/8

ASJC Scopus subject areas

Electronic, Optical and Magnetic Materials
Condensed Matter Physics
Electrical and Electronic Engineering
Materials Chemistry

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10.1109/IEDM.2010.5703475

Cite this

Saitoh, M., Nakabayashi, Y., Ota, K., Uchida, K., & Numata, T. (2010). Understanding of short-channel mobility in Tri-Gate nanowire MOSFETs and enhanced stress memorization technique for performance improvement. In 2010 IEEE International Electron Devices Meeting, IEDM 2010 (pp. 34.3.1-34.3.4). Article 5703475 (Technical Digest - International Electron Devices Meeting, IEDM). https://doi.org/10.1109/IEDM.2010.5703475

Understanding of short-channel mobility in Tri-Gate nanowire MOSFETs and enhanced stress memorization technique for performance improvement. / Saitoh, Masumi; Nakabayashi, Yukio; Ota, Kensuke et al.
2010 IEEE International Electron Devices Meeting, IEDM 2010. 2010. p. 34.3.1-34.3.4 5703475 (Technical Digest - International Electron Devices Meeting, IEDM).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Saitoh, M, Nakabayashi, Y, Ota, K, Uchida, K & Numata, T 2010, Understanding of short-channel mobility in Tri-Gate nanowire MOSFETs and enhanced stress memorization technique for performance improvement. in 2010 IEEE International Electron Devices Meeting, IEDM 2010., 5703475, Technical Digest - International Electron Devices Meeting, IEDM, pp. 34.3.1-34.3.4, 2010 IEEE International Electron Devices Meeting, IEDM 2010, San Francisco, CA, United States, 10/12/6. https://doi.org/10.1109/IEDM.2010.5703475

Saitoh M, Nakabayashi Y, Ota K, Uchida K, Numata T. Understanding of short-channel mobility in Tri-Gate nanowire MOSFETs and enhanced stress memorization technique for performance improvement. In 2010 IEEE International Electron Devices Meeting, IEDM 2010. 2010. p. 34.3.1-34.3.4. 5703475. (Technical Digest - International Electron Devices Meeting, IEDM). doi: 10.1109/IEDM.2010.5703475

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title = "Understanding of short-channel mobility in Tri-Gate nanowire MOSFETs and enhanced stress memorization technique for performance improvement",

abstract = "We systematically studied short-channel mobility (μ) in SOI nanowire transistors (NW Tr.). The strain induced in the NW channel dominates short-L μ. μ of short-L 〈110〉 NW nFETs largely increases due to vertical compressive strain. We achieved further strain enhancement in NW channel by stress memorization technique (SMT). μ increase by SMT is much larger in NW Tr. than in planar Tr. In 〈110〉 NW nFETs, Ion on the same DIBL increases by as much as 58% by SMT thanks to significant RSD reduction in addition to μ increase, while Ion degradation of pFETs is minimal.",

author = "Masumi Saitoh and Yukio Nakabayashi and Kensuke Ota and Ken Uchida and Toshinori Numata",

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AU - Numata, Toshinori

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AB - We systematically studied short-channel mobility (μ) in SOI nanowire transistors (NW Tr.). The strain induced in the NW channel dominates short-L μ. μ of short-L 〈110〉 NW nFETs largely increases due to vertical compressive strain. We achieved further strain enhancement in NW channel by stress memorization technique (SMT). μ increase by SMT is much larger in NW Tr. than in planar Tr. In 〈110〉 NW nFETs, Ion on the same DIBL increases by as much as 58% by SMT thanks to significant RSD reduction in addition to μ increase, while Ion degradation of pFETs is minimal.

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Understanding of short-channel mobility in Tri-Gate nanowire MOSFETs and enhanced stress memorization technique for performance improvement

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