Variable threshold-voltage CMOS technology

Tadahiro Kuroda; Tetsuya Fujita; Fumitoshi Hatcri; Takayasu Sakurai

Variable threshold-voltage CMOS technology

Tadahiro Kuroda, Tetsuya Fujita, Fumitoshi Hatcri, Takayasu Sakurai

Research output: Contribution to journal › Article › peer-review

Abstract

This paper describes a Variable Threshold-voltage CMOS technology (VTCMOS) which controls the threshold voltage (V_TH) by means of substrate bias control. Circuit techniques to combine a switch circuit for an active mode and a pump circuit for a standby mode are presented. Design considerations, such as latch-up immunity and upper limit of reverse substrate bias, are discussed. Experimental results obtained from chips fabricated in a 0.3 μm VTCMOS technology are reported. V_TH controllability including temperature dependence and influence on short channel effect, power penalty caused by the control circuit, substrate current dependence at low V_TH, and substrate noise influence on circuit performance are investigated. A scaling theory is also presented for use in the discussion of future possibilities and problems involved in this technology.

Original language	English
Pages (from-to)	1705-1714
Number of pages	10
Journal	IEICE Transactions on Electronics
Volume	E83-C
Issue number	11
Publication status	Published - 2000 Jan 1

Keywords

Low power CMOS design
Low voltage
Substrate bias
Threshold voltage

ASJC Scopus subject areas

Electronic, Optical and Magnetic Materials
Electrical and Electronic Engineering

Cite this

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abstract = "This paper describes a Variable Threshold-voltage CMOS technology (VTCMOS) which controls the threshold voltage (VTH) by means of substrate bias control. Circuit techniques to combine a switch circuit for an active mode and a pump circuit for a standby mode are presented. Design considerations, such as latch-up immunity and upper limit of reverse substrate bias, are discussed. Experimental results obtained from chips fabricated in a 0.3 μm VTCMOS technology are reported. VTH controllability including temperature dependence and influence on short channel effect, power penalty caused by the control circuit, substrate current dependence at low VTH, and substrate noise influence on circuit performance are investigated. A scaling theory is also presented for use in the discussion of future possibilities and problems involved in this technology.",

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AU - Kuroda, Tadahiro

AU - Fujita, Tetsuya

AU - Hatcri, Fumitoshi

AU - Sakurai, Takayasu

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Y1 - 2000/1/1

N2 - This paper describes a Variable Threshold-voltage CMOS technology (VTCMOS) which controls the threshold voltage (VTH) by means of substrate bias control. Circuit techniques to combine a switch circuit for an active mode and a pump circuit for a standby mode are presented. Design considerations, such as latch-up immunity and upper limit of reverse substrate bias, are discussed. Experimental results obtained from chips fabricated in a 0.3 μm VTCMOS technology are reported. VTH controllability including temperature dependence and influence on short channel effect, power penalty caused by the control circuit, substrate current dependence at low VTH, and substrate noise influence on circuit performance are investigated. A scaling theory is also presented for use in the discussion of future possibilities and problems involved in this technology.

AB - This paper describes a Variable Threshold-voltage CMOS technology (VTCMOS) which controls the threshold voltage (VTH) by means of substrate bias control. Circuit techniques to combine a switch circuit for an active mode and a pump circuit for a standby mode are presented. Design considerations, such as latch-up immunity and upper limit of reverse substrate bias, are discussed. Experimental results obtained from chips fabricated in a 0.3 μm VTCMOS technology are reported. VTH controllability including temperature dependence and influence on short channel effect, power penalty caused by the control circuit, substrate current dependence at low VTH, and substrate noise influence on circuit performance are investigated. A scaling theory is also presented for use in the discussion of future possibilities and problems involved in this technology.

KW - Low power CMOS design

KW - Low voltage

KW - Substrate bias

KW - Threshold voltage

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Variable threshold-voltage CMOS technology

Abstract

Keywords

ASJC Scopus subject areas

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