Abstract
We propose low-power techniques for wireless three-dimensional Network-on-Chips (wireless 3-D NoCs), in which the connec-tions among routers on the same chip are wired while the routers on differ-ent chips are connected wirelessly using inductive-coupling. The proposed low-power techniques stop the clock and power supplies to the transmitter of the wireless vertical links only when their utilizations are higher than the threshold. Meanwhile, the whole wireless vertical link will be shut down when the utilization is lower than the threshold in order to reduce the power consumption of wireless 3-D NoCs. This paper uses an on-demand method, in which the dormant data transmitter or the whole vertical link will be ac-tivated as long as a flit comes. Full-system many-core simulations using power parameters derived from a real chip implementation show that the proposed low-power techniques reduce the power consumption by 23.4%-29.3%, while the performance overhead is less than 2.4%.
Original language | English |
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Pages (from-to) | 2753-2764 |
Number of pages | 12 |
Journal | IEICE Transactions on Information and Systems |
Volume | E96-D |
Issue number | 12 |
DOIs | |
Publication status | Published - 2013 Dec |
Keywords
- 3-D network on chip (3-D NoC)
- Inductive-coupling
- Low power
- On/off vertical link
- Wireless
ASJC Scopus subject areas
- Software
- Hardware and Architecture
- Computer Vision and Pattern Recognition
- Electrical and Electronic Engineering
- Artificial Intelligence