Abstract
A very compact scalable 80 Gbit/s ATM switching module was developed. This module adopts Scalable Distributed Arbitration (SDA), a contention control scheme that is scalable and is not limited by the switch size. Because SDA has relay buffers to relay between neighboring switch LSIs and contention control is performed between the relay buffer and the output buffer, only adjacent LSIs need to send and receive the contention control signals. This solves the conventional contention control problem of a longer contention control time as the switch size increases. The 0.25-μm CMOS/SIMOX (Separation by IMplanted OXygen) technology is adopted. Ultra-high-speed 1.25 Gbit/s I/O pins alleviate LSI pin bottlenecks, and a switching LSI for switching 10 Gbit/s lines in a 4 × 2 switch array at 7 W is achieved. Multiple switching LSIs are mounted in pairs on a multichip module to produce a very compact switching module that achieves a throughput of 80 Gbit/s.
| Original language | English |
|---|---|
| Pages (from-to) | 1-11 |
| Number of pages | 11 |
| Journal | Electronics and Communications in Japan, Part II: Electronics (English translation of Denshi Tsushin Gakkai Ronbunshi) |
| Volume | 84 |
| Issue number | 3 |
| DOIs | |
| Publication status | Published - 2001 Mar |
| Externally published | Yes |
Keywords
- ATM
- Contention control
- Multichip module
- Scalability
- Switch
ASJC Scopus subject areas
- Physics and Astronomy(all)
- Computer Networks and Communications
- Electrical and Electronic Engineering