Warpage and Thermal Stress under Thermal Cycling Test in SiC and Si Power Device Structures Using Direct Chip-Bonding with Ag Sintered Layer on Cu Plate
- Masaki Kanemoto
- , Masaaki Aoki
- , Akihiro Mochizuki
- , Yoshio Murakami
- , Mutsuharu Tsunoda
- , Nobuhiko Nakano
Research output: Chapter in Book/Report/Conference proceeding › Conference contribution
4
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