A 1 Tb/s/mm2 inductive-coupling side-by-side chip link

So Hasegawa; Junichiro Kadomoto; Atsutake Kosuge; Tadahiro Kuroda

doi:10.1109/ESSCIRC.2016.7598343

A 1 Tb/s/mm² inductive-coupling side-by-side chip link

So Hasegawa, Junichiro Kadomoto, Atsutake Kosuge, Tadahiro Kuroda

研究成果: Conference contribution

5 被引用数 (Scopus)

抄録

An inductive coupling technique for wireless interconnection of side-by-side chips within a package is presented. Data is transferred by using changes in magnetic field that occur when the current in coils on the chips is switched off. The circuit layout area and power consumption of transceivers have respectively been reduced to 1/3 and 1/6. A world-leading transmission rate of 1 Tb/s/mm², which is faster by a factor of 3, has been achieved with a 0.18 μm CMOS test chip.

本文言語	English
ホスト出版物のタイトル	ESSCIRC 2016: 42nd European Solid-State Circuits Conference
出版社	IEEE Computer Society
ページ	469-472
ページ数	4
巻	2016-October
ISBN（電子版）	9781509029723
DOI	https://doi.org/10.1109/ESSCIRC.2016.7598343
出版ステータス	Published - 2016 10月 18
イベント	42nd European Solid-State Circuits Conference, ESSCIRC 2016 - Lausanne, Switzerland 継続期間: 2016 9月 12 → 2016 9月 15

Other

Other	42nd European Solid-State Circuits Conference, ESSCIRC 2016
国/地域	Switzerland
City	Lausanne
Period	16/9/12 → 16/9/15

ASJC Scopus subject areas

ハードウェアとアーキテクチャ
電子工学および電気工学

文献へのアクセス

10.1109/ESSCIRC.2016.7598343

他のファイルとリンク

引用スタイル

Hasegawa, S, Kadomoto, J, Kosuge, A & Kuroda, T 2016, A 1 Tb/s/mm² inductive-coupling side-by-side chip link. in ESSCIRC 2016: 42nd European Solid-State Circuits Conference. vol. 2016-October, 7598343, IEEE Computer Society, pp. 469-472, 42nd European Solid-State Circuits Conference, ESSCIRC 2016, Lausanne, Switzerland, 16/9/12. https://doi.org/10.1109/ESSCIRC.2016.7598343

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