A 12.5Gb/s/link non-contact multi drop bus system with impedance-matched transmission line couplers and dicode partial-response channel transceivers

Atsutake Kosuge; Wataru Mizuhara; Noriyuki Miura; Masao Taguchi; Hiroki Ishikuro; Tadahiro Kuroda

doi:10.1109/CICC.2012.6330611

A 12.5Gb/s/link non-contact multi drop bus system with impedance-matched transmission line couplers and dicode partial-response channel transceivers

Atsutake Kosuge, Wataru Mizuhara, Noriyuki Miura, Masao Taguchi, Hiroki Ishikuro, Tadahiro Kuroda

研究成果: Conference contribution

7 被引用数 (Scopus)

抄録

A reduced-reflection multi-drop bus system using Dicode (1-D) partial response signaling transceiver is presented for the first time in the world. Directional couplers on transmission lines arranged with equi-energy distributing and exact impedance matched conditions allow the bus to reach to 12.5Gbps/link speed. The transmission line has 5-convex portions to form one side of a coupler where the transmission line width is adjusted to control the characteristic impedance of the coupling section, minimizing signal reflection from each section. Dicode partial-response signaling method with a half-rate architecture was used where a precoder is placed in the transmitter to make the signal best fit for the channel to eliminate inter symbol interference (ISI) where the test chip transmitter occupies 3,750 μm² and the receiver occupies 750 μm² with 90nm CMOS technology, consuming 40mA and 23mA respectively at the supply voltage of 1.2V.

本文言語	English
ホスト出版物のタイトル	Proceedings of the IEEE 2012 Custom Integrated Circuits Conference, CICC 2012
DOI	https://doi.org/10.1109/CICC.2012.6330611
出版ステータス	Published - 2012 11月 26
イベント	34th Annual Custom Integrated Circuits Conference, CICC 2012 - San Jose, CA, United States 継続期間: 2012 9月 9 → 2012 9月 12

出版物シリーズ

名前	Proceedings of the Custom Integrated Circuits Conference
ISSN（印刷版）	0886-5930

Other

Other	34th Annual Custom Integrated Circuits Conference, CICC 2012
国/地域	United States
City	San Jose, CA
Period	12/9/9 → 12/9/12

ASJC Scopus subject areas

電子工学および電気工学

文献へのアクセス

10.1109/CICC.2012.6330611

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引用スタイル

Kosuge, A., Mizuhara, W., Miura, N., Taguchi, M., Ishikuro, H., & Kuroda, T. (2012). A 12.5Gb/s/link non-contact multi drop bus system with impedance-matched transmission line couplers and dicode partial-response channel transceivers. In Proceedings of the IEEE 2012 Custom Integrated Circuits Conference, CICC 2012 記事 6330611 (Proceedings of the Custom Integrated Circuits Conference). https://doi.org/10.1109/CICC.2012.6330611

A 12.5Gb/s/link non-contact multi drop bus system with impedance-matched transmission line couplers and dicode partial-response channel transceivers. / Kosuge, Atsutake; Mizuhara, Wataru; Miura, Noriyuki その他.
Proceedings of the IEEE 2012 Custom Integrated Circuits Conference, CICC 2012. 2012. 6330611 (Proceedings of the Custom Integrated Circuits Conference).

研究成果: Conference contribution

Kosuge, A, Mizuhara, W, Miura, N, Taguchi, M, Ishikuro, H & Kuroda, T 2012, A 12.5Gb/s/link non-contact multi drop bus system with impedance-matched transmission line couplers and dicode partial-response channel transceivers. in Proceedings of the IEEE 2012 Custom Integrated Circuits Conference, CICC 2012., 6330611, Proceedings of the Custom Integrated Circuits Conference, 34th Annual Custom Integrated Circuits Conference, CICC 2012, San Jose, CA, United States, 12/9/9. https://doi.org/10.1109/CICC.2012.6330611

Kosuge A, Mizuhara W, Miura N, Taguchi M, Ishikuro H, Kuroda T. A 12.5Gb/s/link non-contact multi drop bus system with impedance-matched transmission line couplers and dicode partial-response channel transceivers. In Proceedings of the IEEE 2012 Custom Integrated Circuits Conference, CICC 2012. 2012. 6330611. (Proceedings of the Custom Integrated Circuits Conference). doi: 10.1109/CICC.2012.6330611

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abstract = "A reduced-reflection multi-drop bus system using Dicode (1-D) partial response signaling transceiver is presented for the first time in the world. Directional couplers on transmission lines arranged with equi-energy distributing and exact impedance matched conditions allow the bus to reach to 12.5Gbps/link speed. The transmission line has 5-convex portions to form one side of a coupler where the transmission line width is adjusted to control the characteristic impedance of the coupling section, minimizing signal reflection from each section. Dicode partial-response signaling method with a half-rate architecture was used where a precoder is placed in the transmitter to make the signal best fit for the channel to eliminate inter symbol interference (ISI) where the test chip transmitter occupies 3,750 μm2 and the receiver occupies 750 μm2 with 90nm CMOS technology, consuming 40mA and 23mA respectively at the supply voltage of 1.2V.",

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