A 1.2Gb/s/pin wireless superconnect based on inductive inter-chip signaling (IIS)

Daisuke Mizoguchi; Yusmeeraz Binti Yusof; Noriyuki Miura; Takayasu Sakurai; Tadahiro Kuroda

A 1.2Gb/s/pin wireless superconnect based on inductive inter-chip signaling (IIS)

Daisuke Mizoguchi, Yusmeeraz Binti Yusof, Noriyuki Miura, Takayasu Sakurai, Tadahiro Kuroda

研究成果: Conference article › 査読

抄録

A wireless bus for stacked chips is designed with the interface using inductive coupling with metal spiral inductors. Transceiver circuits for non-return-to-zero signaling are developed. Test chips stacked at a distance of 300μm communicate at data rates of up to 1.2Gb/s/pin. Fabricated in 0.35μm CMOS technology, TX and RX dissipation are 43 and 2.5mW, respectively.

本文言語	English
ページ（範囲）	104-105
ページ数	2
ジャーナル	Digest of Technical Papers - IEEE International Solid-State Circuits Conference
巻	47
出版ステータス	Published - 2003 12月 1
イベント	Digest of Technical Papers - IEEE International Solid-State Circuits Conference: Visuals Supplement - San Francisco, CA., United States 継続期間: 2003 2月 15 → 2003 2月 19

ASJC Scopus subject areas

電子材料、光学材料、および磁性材料
電子工学および電気工学

他のファイルとリンク

引用スタイル

@article{3c7b909bfea34e19ae112cb0ba3e440e,

title = "A 1.2Gb/s/pin wireless superconnect based on inductive inter-chip signaling (IIS)",

abstract = "A wireless bus for stacked chips is designed with the interface using inductive coupling with metal spiral inductors. Transceiver circuits for non-return-to-zero signaling are developed. Test chips stacked at a distance of 300μm communicate at data rates of up to 1.2Gb/s/pin. Fabricated in 0.35μm CMOS technology, TX and RX dissipation are 43 and 2.5mW, respectively.",

author = "Daisuke Mizoguchi and Yusof, {Yusmeeraz Binti} and Noriyuki Miura and Takayasu Sakurai and Tadahiro Kuroda",

year = "2003",

month = dec,

day = "1",

language = "English",

volume = "47",

pages = "104--105",

journal = "Digest of Technical Papers - IEEE International Solid-State Circuits Conference",

issn = "0193-6530",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

note = "Digest of Technical Papers - IEEE International Solid-State Circuits Conference: Visuals Supplement ; Conference date: 15-02-2003 Through 19-02-2003",

}

TY - JOUR

T1 - A 1.2Gb/s/pin wireless superconnect based on inductive inter-chip signaling (IIS)

AU - Mizoguchi, Daisuke

AU - Yusof, Yusmeeraz Binti

AU - Miura, Noriyuki

AU - Sakurai, Takayasu

AU - Kuroda, Tadahiro

PY - 2003/12/1

Y1 - 2003/12/1

N2 - A wireless bus for stacked chips is designed with the interface using inductive coupling with metal spiral inductors. Transceiver circuits for non-return-to-zero signaling are developed. Test chips stacked at a distance of 300μm communicate at data rates of up to 1.2Gb/s/pin. Fabricated in 0.35μm CMOS technology, TX and RX dissipation are 43 and 2.5mW, respectively.

AB - A wireless bus for stacked chips is designed with the interface using inductive coupling with metal spiral inductors. Transceiver circuits for non-return-to-zero signaling are developed. Test chips stacked at a distance of 300μm communicate at data rates of up to 1.2Gb/s/pin. Fabricated in 0.35μm CMOS technology, TX and RX dissipation are 43 and 2.5mW, respectively.

UR - http://www.scopus.com/inward/record.url?scp=2442636622&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=2442636622&partnerID=8YFLogxK

M3 - Conference article

AN - SCOPUS:2442636622

SN - 0193-6530

VL - 47

SP - 104

EP - 105

JO - Digest of Technical Papers - IEEE International Solid-State Circuits Conference

JF - Digest of Technical Papers - IEEE International Solid-State Circuits Conference

T2 - Digest of Technical Papers - IEEE International Solid-State Circuits Conference: Visuals Supplement

Y2 - 15 February 2003 through 19 February 2003

ER -

A 1.2Gb/s/pin wireless superconnect based on inductive inter-chip signaling (IIS)

抄録

ASJC Scopus subject areas

他のファイルとリンク

フィンガープリント

引用スタイル