A 2Gb/s 15pJ/b/chip inductive-coupling programmable bus for NAND flash memory stacking

Yasufumi Sugimori; Yoshinori Kohama; Mitsuko Saito; Yoichi Yoshida; Noriyuki Miura; Hiroki Ishikuro; Takayasu Sakurai; Tadahiro Kuroda

doi:10.1109/ISSCC.2009.4977399

A 2Gb/s 15pJ/b/chip inductive-coupling programmable bus for NAND flash memory stacking

Yasufumi Sugimori, Yoshinori Kohama, Mitsuko Saito, Yoichi Yoshida, Noriyuki Miura, Hiroki Ishikuro, Takayasu Sakurai, Tadahiro Kuroda

電気情報工学科

研究成果: Conference contribution

22 被引用数 (Scopus)

本文言語	English
ホスト出版物のタイトル	2009 IEEE International Solid-State Circuits Conference - Digest of Technical Papers, ISSCC 2009
出版社	Institute of Electrical and Electronics Engineers Inc.
ページ	244-246
ページ数	3
ISBN（印刷版）	1424434580, 9781424434589
DOI	https://doi.org/10.1109/ISSCC.2009.4977399
出版ステータス	Published - 2009
イベント	2009 IEEE International Solid-State Circuits Conference ISSCC 2009 - San Francisco, CA, United States 継続期間: 2009 2月 8 → 2009 2月 12

出版物シリーズ

名前	Digest of Technical Papers - IEEE International Solid-State Circuits Conference
ISSN（印刷版）	0193-6530

Other

Other	2009 IEEE International Solid-State Circuits Conference ISSCC 2009
国/地域	United States
City	San Francisco, CA
Period	09/2/8 → 09/2/12

ASJC Scopus subject areas

電子材料、光学材料、および磁性材料
電子工学および電気工学

文献へのアクセス

10.1109/ISSCC.2009.4977399

他のファイルとリンク

引用スタイル

Sugimori, Y., Kohama, Y., Saito, M., Yoshida, Y., Miura, N., Ishikuro, H., Sakurai, T., & Kuroda, T. (2009). A 2Gb/s 15pJ/b/chip inductive-coupling programmable bus for NAND flash memory stacking. In 2009 IEEE International Solid-State Circuits Conference - Digest of Technical Papers, ISSCC 2009 (pp. 244-246). 記事 4977399 (Digest of Technical Papers - IEEE International Solid-State Circuits Conference). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ISSCC.2009.4977399

A 2Gb/s 15pJ/b/chip inductive-coupling programmable bus for NAND flash memory stacking. / Sugimori, Yasufumi; Kohama, Yoshinori; Saito, Mitsuko その他.
2009 IEEE International Solid-State Circuits Conference - Digest of Technical Papers, ISSCC 2009. Institute of Electrical and Electronics Engineers Inc., 2009. p. 244-246 4977399 (Digest of Technical Papers - IEEE International Solid-State Circuits Conference).

研究成果: Conference contribution

Sugimori, Y, Kohama, Y, Saito, M, Yoshida, Y, Miura, N, Ishikuro, H, Sakurai, T & Kuroda, T 2009, A 2Gb/s 15pJ/b/chip inductive-coupling programmable bus for NAND flash memory stacking. in 2009 IEEE International Solid-State Circuits Conference - Digest of Technical Papers, ISSCC 2009., 4977399, Digest of Technical Papers - IEEE International Solid-State Circuits Conference, Institute of Electrical and Electronics Engineers Inc., pp. 244-246, 2009 IEEE International Solid-State Circuits Conference ISSCC 2009, San Francisco, CA, United States, 09/2/8. https://doi.org/10.1109/ISSCC.2009.4977399

Sugimori Y, Kohama Y, Saito M, Yoshida Y, Miura N, Ishikuro H その他. A 2Gb/s 15pJ/b/chip inductive-coupling programmable bus for NAND flash memory stacking. In 2009 IEEE International Solid-State Circuits Conference - Digest of Technical Papers, ISSCC 2009. Institute of Electrical and Electronics Engineers Inc. 2009. p. 244-246. 4977399. (Digest of Technical Papers - IEEE International Solid-State Circuits Conference). doi: 10.1109/ISSCC.2009.4977399

Sugimori, Yasufumi ; Kohama, Yoshinori ; Saito, Mitsuko その他. / A 2Gb/s 15pJ/b/chip inductive-coupling programmable bus for NAND flash memory stacking. 2009 IEEE International Solid-State Circuits Conference - Digest of Technical Papers, ISSCC 2009. Institute of Electrical and Electronics Engineers Inc., 2009. pp. 244-246 (Digest of Technical Papers - IEEE International Solid-State Circuits Conference).

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