TY - GEN
T1 - A 4.6-373K Functional 800MS/s 12b Buffer-then-Amplify Charge-Pump-Based Pipelined TI-SAR ADC with Integrated-Active-Hold Technique
AU - Yamashita, Kaoru
AU - Yoshioka, Kentaro
AU - Ziegler, Christian
AU - Issakov, Vadim
AU - Ishikuro, Hiroki
N1 - Publisher Copyright:
© 2025 IEEE.
PY - 2025
Y1 - 2025
N2 - The growing demands of cryogenic quantum computing and wide-bandwidth aerospace/automotive wireless communications have created a demand for ADC technologies capable of operating across unprecedented temperature ranges, from room temperature down to 4K, while achieving higher sampling rates and resolution. While pipelined ADC architectures offer a promising solution, their residue amplifier designs face significant challenges in wide-temperature operation, whether implemented as multi-stage closed-loop amplifiers or open-loop amplifiers (Fig. 1). The fundamental challenge lies in the dramatic device parameter variations at cryogenic temperatures, where threshold voltage (Vt) shifts by approximately 100mV and carrier mobility increases by more than 1.5x [1]. These variations create distinct limitations for existing architectures. Multi-stage closed-loop amplifiers require complex bias calibration to maintain stability [2], while open-loop amplifiers [3]-[5] suffer from large gain variations [4], necessitating an unacceptable redundancy range. Open-loop amplifiers also suffer poor linearity, which mandates a high-resolution 1 st stage SAR quantizer and leads to longer conversion times [5].
AB - The growing demands of cryogenic quantum computing and wide-bandwidth aerospace/automotive wireless communications have created a demand for ADC technologies capable of operating across unprecedented temperature ranges, from room temperature down to 4K, while achieving higher sampling rates and resolution. While pipelined ADC architectures offer a promising solution, their residue amplifier designs face significant challenges in wide-temperature operation, whether implemented as multi-stage closed-loop amplifiers or open-loop amplifiers (Fig. 1). The fundamental challenge lies in the dramatic device parameter variations at cryogenic temperatures, where threshold voltage (Vt) shifts by approximately 100mV and carrier mobility increases by more than 1.5x [1]. These variations create distinct limitations for existing architectures. Multi-stage closed-loop amplifiers require complex bias calibration to maintain stability [2], while open-loop amplifiers [3]-[5] suffer from large gain variations [4], necessitating an unacceptable redundancy range. Open-loop amplifiers also suffer poor linearity, which mandates a high-resolution 1 st stage SAR quantizer and leads to longer conversion times [5].
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U2 - 10.1109/CICC63670.2025.10983297
DO - 10.1109/CICC63670.2025.10983297
M3 - Conference contribution
AN - SCOPUS:105007014080
T3 - Proceedings of the Custom Integrated Circuits Conference
BT - 2025 IEEE Custom Integrated Circuits Conference, CICC 2025 - Proceedings
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 45th Annual IEEE Custom Integrated Circuits Conference, CICC 2025
Y2 - 13 April 2025 through 17 April 2025
ER -