TY - GEN
T1 - A 720μW 873MHz-1.008GHz injection-locked frequency multiplier with 0.3V supply voltage in 90nm CMOS
AU - Liu, Lechang
AU - Ishikawa, Keisuke
AU - Kuroda, Tadahiro
PY - 2013/9/17
Y1 - 2013/9/17
N2 - A 0.3V parametric resonance based sub-GHz injection-locked frequency multiplier is developed in 90nm CMOS. This is the first reported variation-tolerant frequency multiplier with 0.3V supply voltage. It achieves 720μW power consumption and -110dBc@600kHz phase noise with the lowest supply voltage in state-of-the-art frequency synthesizers.
AB - A 0.3V parametric resonance based sub-GHz injection-locked frequency multiplier is developed in 90nm CMOS. This is the first reported variation-tolerant frequency multiplier with 0.3V supply voltage. It achieves 720μW power consumption and -110dBc@600kHz phase noise with the lowest supply voltage in state-of-the-art frequency synthesizers.
UR - http://www.scopus.com/inward/record.url?scp=84883797229&partnerID=8YFLogxK
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M3 - Conference contribution
AN - SCOPUS:84883797229
SN - 9784863483484
T3 - IEEE Symposium on VLSI Circuits, Digest of Technical Papers
SP - C140-C141
BT - 2013 Symposium on VLSI Circuits, VLSIC 2013 - Digest of Technical Papers
T2 - 2013 Symposium on VLSI Circuits, VLSIC 2013
Y2 - 12 June 2013 through 14 June 2013
ER -