A dynamic reference single-ended ECL input interface circuit for MCM-Based 80-Gbps ATM switch

Ryusuke Kawano; Naoaki Yamanaka; Eiji Oki; Tomoaki Kawamura

A dynamic reference single-ended ECL input interface circuit for MCM-Based 80-Gbps ATM switch

Ryusuke Kawano
, Naoaki Yamanaka
, Eiji Oki
, Tomoaki Kawamura

研究成果: Article › 査読

抄録

A high-speed dynamic reference single-ended ECL input-interface circuit has been fabricated for advanced ATM switching MCMs. To raise the limit on the number of I/O pins, this circuit operates with a reference signal directly generated from the input signal itself. The reference level is changed dynamically to achieve a larger noise margin for operation. Experimental results show that operation up to 3.4 Gbps with a large level margin can be attained. We deploy this circuit to the input interface LSIs of an 80-Gbps ATM switching MCM.

本文言語	English
ページ（範囲）	519-524
ページ数	6
ジャーナル	IEICE Transactions on Electronics
巻	E82-C
号	3
出版ステータス	Published - 1999
外部発表	はい

ASJC Scopus subject areas

電子材料、光学材料、および磁性材料
電子工学および電気工学

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引用スタイル

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abstract = "A high-speed dynamic reference single-ended ECL input-interface circuit has been fabricated for advanced ATM switching MCMs. To raise the limit on the number of I/O pins, this circuit operates with a reference signal directly generated from the input signal itself. The reference level is changed dynamically to achieve a larger noise margin for operation. Experimental results show that operation up to 3.4 Gbps with a large level margin can be attained. We deploy this circuit to the input interface LSIs of an 80-Gbps ATM switching MCM.",

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AU - Kawano, Ryusuke

AU - Yamanaka, Naoaki

AU - Oki, Eiji

AU - Kawamura, Tomoaki

PY - 1999

Y1 - 1999

N2 - A high-speed dynamic reference single-ended ECL input-interface circuit has been fabricated for advanced ATM switching MCMs. To raise the limit on the number of I/O pins, this circuit operates with a reference signal directly generated from the input signal itself. The reference level is changed dynamically to achieve a larger noise margin for operation. Experimental results show that operation up to 3.4 Gbps with a large level margin can be attained. We deploy this circuit to the input interface LSIs of an 80-Gbps ATM switching MCM.

AB - A high-speed dynamic reference single-ended ECL input-interface circuit has been fabricated for advanced ATM switching MCMs. To raise the limit on the number of I/O pins, this circuit operates with a reference signal directly generated from the input signal itself. The reference level is changed dynamically to achieve a larger noise margin for operation. Experimental results show that operation up to 3.4 Gbps with a large level margin can be attained. We deploy this circuit to the input interface LSIs of an 80-Gbps ATM switching MCM.

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KW - High-speed interconnection

KW - MCM

KW - Noise margin

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A dynamic reference single-ended ECL input interface circuit for MCM-Based 80-Gbps ATM switch

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