TY - GEN
T1 - A highly-dense mixed grained reconfigurable architecture with overlay crossbar interconnect using via-switch
AU - Hotate, Junshi
AU - Kishimoto, Takashi
AU - Higashi, Toshiki
AU - Ochi, Hiroyuki
AU - Doi, Ryutaro
AU - Tada, Munehiro
AU - Sugibayashi, Tadahiko
AU - Wakabayashi, Kazutoshi
AU - Onodera, Hidetoshi
AU - Mitsuyama, Yukio
AU - Hashimoto, Masanori
N1 - Publisher Copyright:
© 2016 EPFL.
PY - 2016/9/26
Y1 - 2016/9/26
N2 - This paper proposes a highly-dense reconfigurable architecture that introduces via-switch device, which is a kind of resistive RAM and is used in crossbar switches. Since via-switch is implemented in BEOL layers only, the FEOL layer under the crossbar can be fully exploited for highly-dense logic blocks. The proposed architecture uses the FEOL layer for fine-grained look-up tables and coarse-grained arithmetic/memory units for better performance and highly wide applications. In a case study of application mapping, the proposed architecture reduces array area by 76% thanks to mixed grained logic structure and overlay bidirectional interconnection. Thanks to 18F2 footprint and one order of magnitude lower resistivity of via-switch compared to MOS switch, the crossbar density is improved by 26× and the delay and energy in the interconnection are reduced by 90% and 93% at 0.5V operation.
AB - This paper proposes a highly-dense reconfigurable architecture that introduces via-switch device, which is a kind of resistive RAM and is used in crossbar switches. Since via-switch is implemented in BEOL layers only, the FEOL layer under the crossbar can be fully exploited for highly-dense logic blocks. The proposed architecture uses the FEOL layer for fine-grained look-up tables and coarse-grained arithmetic/memory units for better performance and highly wide applications. In a case study of application mapping, the proposed architecture reduces array area by 76% thanks to mixed grained logic structure and overlay bidirectional interconnection. Thanks to 18F2 footprint and one order of magnitude lower resistivity of via-switch compared to MOS switch, the crossbar density is improved by 26× and the delay and energy in the interconnection are reduced by 90% and 93% at 0.5V operation.
UR - https://www.scopus.com/pages/publications/84994893458
UR - https://www.scopus.com/pages/publications/84994893458#tab=citedBy
U2 - 10.1109/FPL.2016.7577337
DO - 10.1109/FPL.2016.7577337
M3 - Conference contribution
AN - SCOPUS:84994893458
T3 - FPL 2016 - 26th International Conference on Field-Programmable Logic and Applications
BT - FPL 2016 - 26th International Conference on Field-Programmable Logic and Applications
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 26th International Conference on Field-Programmable Logic and Applications, FPL 2016
Y2 - 29 August 2016 through 2 September 2016
ER -