A low-IF CMOS single-chip bluetooth EDR transmitter with digital I/Q mismatch trimming circuit

D. Miyashita; H. Ishikuro; T. Shimada; T. Tanzawa; S. Kousai; H. Kobayashi; H. Majima; K. Agawa; M. Hamada; F. Hatori

doi:10.1109/VLSIC.2005.1469390

A low-IF CMOS single-chip bluetooth EDR transmitter with digital I/Q mismatch trimming circuit

D. Miyashita, H. Ishikuro, T. Shimada, T. Tanzawa, S. Kousai, H. Kobayashi, H. Majima, K. Agawa, M. Hamada, F. Hatori

研究成果: Paper › 査読

7 被引用数 (Scopus)

抄録

A single-chip low-IF transmitter for the Bluetooth Enhanced Data Rate (max. 3Mbps) was fabricated in 0.18-μm CMOS process. A quantitative study on the relation between the VCO pulling, intermediate frequency, and the linearity of the PA shows that the IMHz-IF is the best solution. By a digital DC offset cancellation and I/Q mismatch trimming techniques, the LO and image signal leakages are suppressed below -40dBc and -50dBc, respectively.

本文言語	English
ページ	298-301
ページ数	4
DOI	https://doi.org/10.1109/VLSIC.2005.1469390
出版ステータス	Published - 2005
外部発表	はい
イベント	2005 Symposium on VLSI Circuits - Kyoto, Japan 継続期間: 2005 6月 16 → 2005 6月 18

Other

Other	2005 Symposium on VLSI Circuits
国/地域	Japan
City	Kyoto
Period	05/6/16 → 05/6/18

ASJC Scopus subject areas

電子材料、光学材料、および磁性材料
電子工学および電気工学

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10.1109/VLSIC.2005.1469390

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title = "A low-IF CMOS single-chip bluetooth EDR transmitter with digital I/Q mismatch trimming circuit",

abstract = "A single-chip low-IF transmitter for the Bluetooth Enhanced Data Rate (max. 3Mbps) was fabricated in 0.18-μm CMOS process. A quantitative study on the relation between the VCO pulling, intermediate frequency, and the linearity of the PA shows that the IMHz-IF is the best solution. By a digital DC offset cancellation and I/Q mismatch trimming techniques, the LO and image signal leakages are suppressed below -40dBc and -50dBc, respectively.",

keywords = "Digital trimming, I/Q mismatch, Low-IF, RF CMOS, VCO pulling",

author = "D. Miyashita and H. Ishikuro and T. Shimada and T. Tanzawa and S. Kousai and H. Kobayashi and H. Majima and K. Agawa and M. Hamada and F. Hatori",

year = "2005",

doi = "10.1109/VLSIC.2005.1469390",

language = "English",

pages = "298--301",

note = "2005 Symposium on VLSI Circuits ; Conference date: 16-06-2005 Through 18-06-2005",

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T1 - A low-IF CMOS single-chip bluetooth EDR transmitter with digital I/Q mismatch trimming circuit

AU - Miyashita, D.

AU - Ishikuro, H.

AU - Shimada, T.

AU - Tanzawa, T.

AU - Kousai, S.

AU - Kobayashi, H.

AU - Majima, H.

AU - Agawa, K.

AU - Hamada, M.

AU - Hatori, F.

PY - 2005

Y1 - 2005

N2 - A single-chip low-IF transmitter for the Bluetooth Enhanced Data Rate (max. 3Mbps) was fabricated in 0.18-μm CMOS process. A quantitative study on the relation between the VCO pulling, intermediate frequency, and the linearity of the PA shows that the IMHz-IF is the best solution. By a digital DC offset cancellation and I/Q mismatch trimming techniques, the LO and image signal leakages are suppressed below -40dBc and -50dBc, respectively.

AB - A single-chip low-IF transmitter for the Bluetooth Enhanced Data Rate (max. 3Mbps) was fabricated in 0.18-μm CMOS process. A quantitative study on the relation between the VCO pulling, intermediate frequency, and the linearity of the PA shows that the IMHz-IF is the best solution. By a digital DC offset cancellation and I/Q mismatch trimming techniques, the LO and image signal leakages are suppressed below -40dBc and -50dBc, respectively.

KW - Digital trimming

KW - I/Q mismatch

KW - Low-IF

KW - RF CMOS

KW - VCO pulling

UR - http://www.scopus.com/inward/record.url?scp=33745123361&partnerID=8YFLogxK

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DO - 10.1109/VLSIC.2005.1469390

M3 - Paper

AN - SCOPUS:33745123361

SP - 298

EP - 301

T2 - 2005 Symposium on VLSI Circuits

Y2 - 16 June 2005 through 18 June 2005

ER -

A low-IF CMOS single-chip bluetooth EDR transmitter with digital I/Q mismatch trimming circuit

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