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A robust low-κ/Cu Dual Damascene Interconnect (DDI) with Sidewall Protection Layer (SPL)

  • Makoto Ueki
  • , Munehiro Tada
  • , Masayoshi Tagami
  • , Mitsuru Narihiro
  • , Fuminori Ito
  • , Yoshihiro Hayashi

研究成果: Article › 査読

抄録

A robust Cu dual-damascene (DD) interconnect has been developed in a low-density (LD) SiOCH film with a low- ksidewall protection layer (SPL) made of plasmapolymerized divinylsiloxane-benzocyclobuten (p-BCB, k = 2.7). A thinned Ta/TaN barrier-metal (BM) structure combined with the low-kSPL was implemented. The SPL covering the DD sidewall in the LD-SiOCH film secures the spacing between the lines and vias, and makes low- ksurface smooth which enhances the BM coverage on the DD sidewalls. As a result, the leakage yield against via misalignment and the insulating reliability such as time-dependent dielectric breakdown between the DDIs, particularly with vias, are improved. With our special p-BCB SPL, the BM was able to be thinned to half as thick as the conventional one, reducing resistances of the vias and the line and the interconnect RC delay without any degradation in the via electromigration reliability. The combination of the low-k SPL with the thin BM is a key for scaled-down robust LSIs with Cu DDIs in low-kdielectrics.

本文言語English
論文番号5688228
ページ(範囲)98-105
ページ数8
ジャーナルIEEE Transactions on Device and Materials Reliability
巻11
号1
DOI
出版ステータスPublished - 2011 3月
外部発表はい

ASJC Scopus subject areas

  • 電子材料、光学材料、および磁性材料
  • 安全性、リスク、信頼性、品質管理
  • 電子工学および電気工学

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